The PXIe-7915 is a high-performance PXI FlexRIO coprocessor module designed to add programmable, real-time signal processing to PXI Express systems. It combines a Xilinx Kintex UltraScale KU060 FPGA, 4 GB onboard DRAM and PCI Express Gen 3 x8 connectivity.
Using peer-to-peer streaming, the PXIe-7915 can transfer data between compatible PXI Express instruments at rates up to 7 GB/s without routing every data stream through the host controller. Its large FPGA is well suited for RF processing, radar prototyping, channelization, spectral analysis and computationally demanding test systems.
Key Features of the PXIe-7915
- Xilinx Kintex UltraScale KU060 FPGA
- 331,680 FPGA lookup tables
- 2,760 DSP48 slices
- 38 Mb of embedded block RAM
- 4 GB onboard DRAM
- Maximum theoretical DRAM bandwidth of 17 GB/s
- PCI Express Gen 3 x8 interface
- Peer-to-peer streaming at up to 7 GB/s
- Eight bidirectional single-ended digital I/O channels
- Four high-speed serial transmit channels
- Four high-speed serial receive channels
- Serial data rates from 500 Mb/s to 16.375 Gb/s
- 60 DMA channels
- Support for PXI backplane timing and triggers
- Programmable using LabVIEW FPGA
- Support for Xilinx Vivado development workflows
PXIe-7915 Technical Specifications
| Product Model | PXIe-7915 |
|---|---|
| Part Number | 785174-01 |
| Product Type | PXI FlexRIO Coprocessor Module |
| FPGA | Xilinx Kintex UltraScale KU060 |
| FPGA Slices | 82,920 |
| Lookup Tables | 331,680 |
| DSP48 Slices | 2,760 |
| Embedded Block RAM | 38 Mb |
| Onboard DRAM | 4 GB, arranged as two 2 GB banks |
| DRAM Clock Rate | 1,064 MHz |
| LabVIEW FPGA DRAM Clock | 267 MHz |
| Maximum Theoretical DRAM Rate | 17 GB/s total; 8.5 GB/s per bank |
| Bus Interface | PCI Express Gen 3 x8 |
| Maximum Peer-to-Peer Rate | Up to 7 GB/s |
| DMA Channels | 60 |
| Digital I/O Channels | 8 bidirectional single-ended channels |
| Digital Voltage Families | 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V |
| Digital Output Toggle Rate | 60 MHz nominal with a 100 μA load |
| High-Speed Serial Channels | 4 transmit and 4 receive |
| High-Speed Serial Rate | 500 Mb/s to 16.375 Gb/s nominal |
| Front Connector | Molex Nano-Pitch I/O |
| Default FPGA Timebase | 80 MHz |
| Timebase Reference | PXI Express 100 MHz clock |
| Maximum Power Requirement | 58 W |
| Operating Temperature | 0°C to 55°C with adequate chassis slot cooling |
| Dimensions | 18.8 cm × 12.9 cm, excluding connectors |
| Weight | 190 g |
PXIe-7915 Part Number and Configuration
| Part Number | FPGA | DRAM | PXI Interface | Auxiliary I/O |
|---|---|---|---|---|
| 785174-01 | Kintex UltraScale KU060 | 4 GB | PCI Express Gen 3 x8 | 8 GPIO and 4 TX/4 RX high-speed serial lanes |
The PXIe-7915 has one primary hardware configuration. Part number 785174-01 identifies the KU060 version with 4 GB DRAM and front-panel GPIO and high-speed serial connectivity.
Kintex UltraScale KU060 FPGA
The PXIe-7915 contains a Xilinx Kintex UltraScale KU060 FPGA with 331,680 lookup tables, 2,760 DSP48 slices and 38 Mb of embedded block RAM.
This resource set supports large, highly parallel signal-processing algorithms that may not fit on smaller FlexRIO coprocessors.
- Wideband digital downconversion
- Large fast Fourier transforms
- Multichannel frequency channelization
- Parallel digital filtering
- Radar pulse processing
- Real-time signal classification
- Custom modulation and demodulation
- High-speed event detection
- Data compression and reduction
- Deterministic hardware decision making
Some FPGA resources are reserved for PCI Express, configuration and board-level interfaces. The usable resources are therefore slightly lower than the total FPGA capacity.
4 GB High-Bandwidth DRAM
The PXIe-7915 includes 4 GB of onboard DRAM divided into two 2 GB banks. Each bank provides a maximum theoretical bandwidth of 8.5 GB/s, resulting in 17 GB/s of combined theoretical memory throughput.
The memory can support:
- High-speed waveform buffering
- Large record storage
- Long digital delay chains
- Channel emulation
- Large lookup tables
- Multistage processing pipelines
- Temporary storage before data reduction
The actual DRAM throughput depends on access patterns, transfer sizes, arbitration and FPGA implementation.
7 GB/s Peer-to-Peer Streaming
The PCI Express Gen 3 x8 interface enables the PXIe-7915 to stream data to and from compatible PXI Express modules at rates up to 7 GB/s.
Peer-to-peer streaming creates a direct path between modules without routing every data block through the host controller. This reduces CPU workload and supports low-latency processing of large data streams.
For example, a PXI vector signal transceiver can send acquired IQ data directly to the PXIe-7915 for custom processing before results are transferred to the controller or another instrument.
FPGA Coprocessing for PXI Instruments
The PXIe-7915 is an FPGA coprocessor rather than a standalone analog measurement instrument. It processes data generated or acquired by other PXI modules or connected through its digital interfaces.
Compatible source modules may include:
- Vector signal transceivers
- RF signal analyzers
- High-speed digitizers
- Oscilloscopes
- Waveform generators
- Other FPGA-enabled PXI modules
This architecture allows additional FPGA processing to be added without replacing the original measurement instrument.
Eight Bidirectional Digital I/O Channels
The front-panel Nano-Pitch connector provides eight bidirectional, single-ended digital I/O channels. Each line supports independent direction control.
The supported voltage families are 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V. The nominal maximum output toggle rate is 60 MHz with a 100 μA load.
These digital lines can be used for external triggering, status monitoring, control signals and communication with custom electronics.
High-Speed Serial Transceivers
The PXIe-7915 provides four high-speed serial transmit channels and four receive channels through the front-panel DIO connector.
The Kintex UltraScale GTH transceivers support nominal line rates from 500 Mb/s to 16.375 Gb/s. These channels can be used for custom serial protocols, external FPGA interfaces and direct FPGA-to-FPGA communication.
PXI Timing and Trigger Resources
The PXIe-7915 can access the following timing and synchronization resources through the PXI Express backplane:
- PXI trigger lines
- PXI_CLK10
- PXI star trigger
- PXIe_DStarB
- PXIe_DStarC
- PXIe_Sync100
These resources allow FPGA processing to be coordinated with other instruments in synchronized acquisition, generation and RF test systems.
60 DMA Channels
The PXIe-7915 provides 60 DMA channels for high-speed data movement. Multiple DMA channels can separate raw input data, processed results, control information and FPGA status into independent transfer paths.
DMA transfers help move data efficiently without requiring the host CPU to manage every transaction.
Typical PXIe-7915 Applications
- Real-time RF signal processing
- Vector signal transceiver coprocessing
- Radar and electronic warfare prototyping
- Wideband digital downconversion
- Multichannel frequency channelization
- Spectrum monitoring
- Signal classification
- Beamforming algorithms
- Data reduction before storage
- FPGA-to-FPGA streaming
- High-speed serial protocol processing
- Semiconductor validation
- Hardware-in-the-loop testing
- High-throughput automated testing
Software Support
The PXIe-7915 is supported by NI LabVIEW Instrument Design Libraries for FlexRIO. These libraries provide programming interfaces, documentation and sample projects for configuring the module and developing FPGA applications.
- LabVIEW
- LabVIEW FPGA Module
- Instrument Design Libraries for FlexRIO
- NI FlexRIO driver
- Xilinx Vivado development tools
Engineers can use LabVIEW FPGA for graphical development or supported Xilinx workflows for integrating HDL code, specialized IP and complex digital designs.
PXI Express Chassis Requirements
The PXIe-7915 requires a compatible PXI Express chassis and a Gen 3 x8-capable peripheral slot to achieve maximum peer-to-peer and host-streaming performance.
The selected slot must provide at least 58 W of cooling capacity. Large FPGA designs and high operating frequencies can increase power consumption, making chassis airflow and cooling particularly important.
Browse compatible NI PXI modules and system components when configuring a complete FPGA processing system.
PXIe-7915 Troubleshooting
Why is peer-to-peer throughput lower than 7 GB/s?
Confirm that the source and destination modules support peer-to-peer transfers and are installed in chassis slots with compatible Gen 3 x8 data paths. Transfer size, FPGA logic and chassis topology also affect throughput.
Why does the FPGA design fail to compile?
Verify that the design fits within the KU060 lookup tables, DSP slices and block RAM. Check timing constraints and reduce resource usage if the design exceeds available capacity.
Why does the module revert to its default FPGA personality?
A large FPGA design operating above 150 MHz can require more power than the slot provides. Confirm chassis cooling and optimize resource utilization and clock domains.
Why is the high-speed serial interface unavailable?
Confirm that the FPGA personality enables the required GTH transceivers. Verify cable, connector, reference clock and external-device compatibility.
Why is the PXIe-7915 not detected?
Confirm that the module is installed in a compatible PXI Express slot. Verify the chassis controller, operating system, FlexRIO driver and development-software versions.
Why is DRAM performance lower than expected?
Small or random memory transactions can reduce throughput. Use appropriate buffering and burst transfers, and review arbitration between competing FPGA processes.
Can the PXIe-7915 measure analog signals directly?
No. It is an FPGA coprocessor without an integrated analog front end. Analog data must be provided by another compatible PXI instrument.
PXIe-7915 Comparison
| Model | FPGA | DRAM | PXI Interface | Auxiliary I/O | Primary Difference |
|---|---|---|---|---|---|
| PXIe-7915 | Kintex UltraScale KU060 | 4 GB | Gen 3 x8 | 8 GPIO and 4 TX/4 RX HSS | Largest FPGA in the PXIe-791x coprocessor family |
| PXIe-7912 | Kintex UltraScale KU040 | 4 GB | Gen 3 x8 | 8 GPIO and 4 TX/4 RX HSS | Lower FPGA capacity with the same DRAM and connectivity |
| PXIe-7911 | Kintex UltraScale KU035 | None | Gen 3 x8 | No front-panel auxiliary I/O | Smaller FPGA without external DRAM |
| PXIe-7976 | Kintex-7 410T | 2 GB | Gen 2 x8 | FlexRIO adapter interface | Designed for modular analog and digital FlexRIO adapters |
| PXIe-7903 | Virtex UltraScale+ VU11P | 20 GB | Gen 3 x8 | 48 TX/RX serial lanes | High-end serial instrument for protocol and data-movement applications |
Recommended Related Products
- PXIe-7912 – Recommended when a KU040 FPGA provides sufficient processing resources with the same 4 GB DRAM and Gen 3 x8 connectivity.
- PXIe-7911 – Suitable for smaller FPGA applications that do not require onboard DRAM or front-panel auxiliary I/O.
- PXIe-7976 – Provides a modular FlexRIO platform for compatible analog, digital and RF adapter modules.
- PXIe-7903 – Designed for applications requiring substantially larger FPGA resources and up to 48 high-speed serial transmit and receive lanes.
How to Select the Right PXI FPGA Coprocessor
- Choose the PXIe-7915 for demanding RF and signal-processing algorithms requiring the largest PXIe-791x FPGA.
- Choose the PXIe-7912 for moderate processing requirements with the same DRAM and auxiliary I/O.
- Choose the PXIe-7911 when external DRAM and front-panel I/O are unnecessary.
- Choose a PXIe-797x FPGA module when a modular FlexRIO analog or digital adapter is required.
- Choose a PXI high-speed serial instrument when the application requires many dedicated protocol-testing lanes.
Why Choose the PXIe-7915?
The PXIe-7915 provides the largest FPGA resource set in the PXIe-791x coprocessor family. Its KU060 FPGA, 4 GB DRAM and Gen 3 x8 interface support complex real-time processing of high-bandwidth PXI data streams.
It is particularly valuable for systems that need to extend the processing capacity of RF instruments, digitizers and other FPGA-enabled PXI modules without replacing the original measurement hardware.
Frequently Asked Questions
What is the PXIe-7915?
The PXIe-7915 is a Kintex UltraScale KU060 FPGA coprocessor that adds high-performance real-time signal processing and data movement to PXI Express systems.
What is the PXIe-7915 part number?
The standard NI part number is 785174-01.
What FPGA does the PXIe-7915 use?
It uses a Xilinx Kintex UltraScale KU060 FPGA with 331,680 LUTs, 2,760 DSP48 slices and 38 Mb of embedded block RAM.
How much onboard memory is included?
The PXIe-7915 includes 4 GB of DRAM arranged as two 2 GB banks.
What is the maximum peer-to-peer streaming rate?
The module supports peer-to-peer transfers with compatible PXI Express modules at rates up to 7 GB/s.
Does the PXIe-7915 provide analog inputs?
No. It is a coprocessor without an integrated analog front end. Analog data must come from another PXI instrument.
What digital interfaces are available?
The module provides eight bidirectional GPIO channels, four high-speed serial transmit channels and four receive channels.
Can the PXIe-7915 be programmed with Vivado?
Yes. It supports development using LabVIEW FPGA or compatible Xilinx Vivado workflows.
What is the difference between the PXIe-7915 and PXIe-7912?
Both modules provide 4 GB DRAM, Gen 3 x8 connectivity and similar auxiliary I/O. The PXIe-7915 uses a larger KU060 FPGA, while the PXIe-7912 uses a KU040 FPGA.
Can the PXIe-7915 operate independently?
No. It requires a compatible PXI Express chassis, system controller or peer-to-peer source module and the appropriate software environment.
Request a Quote for the PXIe-7915
Contact us for current availability, lead time and project pricing for the PXIe-7915 PXI FlexRIO Coprocessor Module. We can also help verify compatible PXI chassis, controllers, RF instruments and peer-to-peer streaming configurations.
