PXI Synchronization
NI PXI Synchronization and Timing Modules
NI PXI Synchronization modules generate, import, route and distribute reference clocks, sample clocks and trigger events among instruments in one or more PXI systems. They are used when digitizers, waveform generators, RF instruments, data acquisition devices or FPGA modules must operate from coordinated timing resources.
PXI synchronization requirements range from starting several instruments from one trigger to maintaining phase-coherent operation across multiple chassis or correlating measurements with GPS, IRIG-B or IEEE 1588 time. Selecting the correct module requires understanding the timing source, oscillator stability, chassis timing slot, backplane routes, front-panel connections, cabling and instrument-level synchronization method.
What Is PXI Synchronization?
PXI synchronization coordinates the timing behavior of multiple instruments. Depending on the application, this can involve sharing a reference frequency, distributing a sample clock, sending a start trigger, aligning waveform generation or attaching an absolute timestamp to an event.
These timing objectives are related but not identical:
| Synchronization Objective | What It Controls | Typical Resource | Example Application |
|---|---|---|---|
| Frequency Synchronization | Long-term agreement between instrument timebases | 10 MHz or 100 MHz reference clock | Preventing drift between digitizers during a long acquisition |
| Start Synchronization | When instruments begin an operation | Shared start or reference trigger | Starting several acquisition modules from one event |
| Sample-Clock Synchronization | The exact timing of individual samples or updates | Shared sample clock or derived clocks | Simultaneous multichannel waveform acquisition |
| Phase Synchronization | Repeatable phase relationship between instruments | Shared reference, trigger and device-specific phase alignment | Phase-coherent RF generation and analysis |
| Time Synchronization | Relationship to an absolute or network-distributed timebase | GPS, IRIG-B, PPS or IEEE 1588 | Timestamping events across distributed test locations |
Sharing a reference clock does not automatically make two instruments sample at the same instant or operate with zero phase offset. Complete synchronization may require a common reference, a coordinated trigger and instrument-specific phase-alignment commands.
PXI Synchronization Module Types
| Тип модуля | Primary Function | Best Fit | Key Selection Factor |
|---|---|---|---|
| Slave Timing Module | Receives and distributes external clock and trigger signals | Secondary chassis in an established master-slave system | Imported clock range, trigger connections and backplane routing |
| TCXO Timing Module | Generates a stable reference and programmable timing signals | General multichassis and instrument synchronization | Oscillator accuracy, clock generation and chassis compatibility |
| OCXO Timing Module | Provides a higher-stability onboard frequency reference | RF, precision measurement and low-drift timing systems | Warm-up, calibration, stability and supported clock routes |
| Absolute-Time Module | Synchronizes the system to external time protocols | Distributed acquisition, event timestamping and test-site correlation | GPS, IRIG-B, IEEE 1588, PPS and antenna or network requirements |
Representative NI PXI Synchronization Modules
| Модель | Unique Category | Core Architecture | Best Fit |
|---|---|---|---|
| PXI-6651 | Slave PXI Synchronization | Receives external clock and trigger signals and distributes them through conventional PXI backplane resources | Secondary chassis that already receives timing from a master source |
| PXI-6652 | TCXO Master PXI Timing | Conventional PXI timing module with a TCXO reference, programmable clock generation and front-panel timing connections | General-purpose master timing in established PXI systems |
| PXI-6653 | OCXO Master PXI Timing | Multichassis PXI synchronization module using an OCXO for a more stable onboard reference | Legacy PXI systems requiring higher-stability clock generation |
| PXIe-6672 | TCXO PXI Express System Timing | PXI Express system timing module with a 3.5 ppm TCXO, DDS clock generation, clock import/export and PXI trigger access | General PXIe synchronization and external-instrument integration |
| PXIe-6674T | Precision OCXO PXI Express Timing | 80 ppb OCXO-based system timing module with clock generation, clock import/export and PXI, PXI star and PXIe differential-star routing | High-accuracy, low-skew and phase-coherent PXI Express systems |
| PXI-6683H | GPS and Network Time Synchronization | Hybrid-slot timing module supporting GPS, IRIG-B, IEEE 1588, PPS and an onboard TCXO | Absolute timestamping and synchronization across distributed systems |
PXI-665x modules primarily support established conventional PXI systems. PXIe-6672 and PXIe-6674T are designed for PXI Express system timing slots, while the PXI-6683H focuses on absolute and network-distributed time rather than serving as a direct replacement for every clock-generation function.
How to Select a PXI Synchronization Module
1. Define the Required Synchronization Result
Start by defining what must be synchronized. Determine whether the instruments only need to begin together, share a common frequency reference, sample at aligned instants, maintain a defined phase relationship or correlate events to universal time.
A shared start trigger may be sufficient for a basic automated test. Phase-coherent RF or multichassis acquisition normally requires a more complete clock, trigger and calibration architecture.
2. Identify the Master Timing Source
Every synchronized system needs a defined timing source. The source may be an onboard TCXO or OCXO, an external laboratory reference, another PXI chassis, GPS, IRIG-B or an IEEE 1588 network.
A slave timing module such as the PXI-6651 cannot replace a master reference generator. It is designed to receive and redistribute timing supplied by another device.
3. Choose TCXO or OCXO Stability
A temperature-compensated crystal oscillator provides a stable onboard reference suitable for many general timing applications. An oven-controlled crystal oscillator maintains the resonator at a controlled temperature and provides better frequency stability for precision systems.
OCXO performance depends on warm-up time, calibration status and environmental conditions. Select oscillator performance from the permitted frequency error and drift over the actual test duration rather than from the oscillator name alone.
4. Confirm PXI or PXI Express Compatibility
Conventional PXI and PXI Express timing modules use different backplane connectors and timing resources. PXIe modules designed for the system timing slot should not be treated as ordinary peripheral modules.
The PXI-6683H uses a PXI hybrid connector and must be installed in a compatible hybrid slot. Review the exact Шасси PXI slot map before ordering.
5. Verify the System Timing Slot
The system timing slot provides dedicated access to star-trigger and clock-distribution resources. Installing a timing module in another mechanically compatible slot may limit or prevent access to these functions.
Confirm the system timing slot number from the chassis manual. It is not always safe to assume that the same physical slot number is used across every chassis model.
6. Determine the Required Backplane Resources
PXI systems can provide several timing paths:
- PXI_CLK10 for the conventional 10 MHz system reference
- PXIe_CLK100 for the PXI Express 100 MHz reference
- PXI_TRIG shared trigger-bus lines
- PXI_STAR point-to-point trigger connections
- PXIe-DStarA, DStarB and DStarC differential-star resources
The timing module and receiving instruments must support the same route. A backplane resource available in the chassis cannot be used if the installed instrument or its driver does not support that timing path.
7. Review Front-Panel Clock and Trigger I/O
Front-panel connections are used to import or export clocks and triggers between chassis and external equipment. Confirm connector type, signal direction, impedance, logic level, maximum frequency and termination.
Do not connect a signal based only on connector shape. SMB, SMA and other coaxial connectors may carry different voltage standards and termination requirements.
8. Determine Whether Absolute Time Is Required
GPS, IRIG-B and IEEE 1588 are used when events must be correlated to an external timebase or across physically separated systems. This is different from distributing a low-skew sample clock within one chassis.
The PXI-6683H can timestamp events and synchronize the PXI system to supported external protocols. Verify GPS antenna placement, network topology, IRIG format, operating system and protocol requirements as part of the complete design.
9. Calculate the Number of Chassis
A multichassis system normally uses one defined master and one timing receiver or compatible timing module in each additional chassis. Clock and trigger signals are then distributed through front-panel cables between the chassis.
Include every chassis, external instrument and remote measurement location in the timing diagram before purchasing hardware.
10. Verify Instrument-Level Synchronization
The timing module distributes timing resources, but each digitizer, generator, RF instrument or DAQ device must be configured to use them. Some instruments also require an instrument-specific synchronization or phase-reset procedure.
NI-TClk can synchronize supported modular instruments by coordinating sample clocks, triggers and device delay. Support depends on the instrument family and driver and should not be assumed for every PXI module.
Understanding PXI Clock and Trigger Resources
| Timing Resource | Topology | Primary Use | Design Consideration |
|---|---|---|---|
| PXI_CLK10 | Shared 10 MHz chassis reference | Common frequency reference for compatible modules | Does not by itself align the start or phase of every instrument |
| PXIe_CLK100 | PXI Express 100 MHz reference distribution | PXIe system timing and clock derivation | Instrument support and chassis architecture must be verified |
| PXI_TRIG | Shared parallel trigger bus | Start triggers, reference triggers and general events | Routes may be shared, reserved or driven by other modules |
| PXI_STAR | Point-to-point star connection | Lower-skew trigger distribution from the timing slot | Requires correct timing-slot placement and compatible modules |
| PXIe-DStarA | Differential point-to-point path from timing slot | High-speed clock distribution to compatible peripheral slots | Chassis and receiving-module support varies |
| PXIe-DStarB | Differential point-to-point path from timing slot | Low-skew trigger distribution | Route availability depends on hardware and driver support |
| PXIe-DStarC | Differential return path toward timing slot | Receiving events or timing signals from compatible modules | Not every instrument implements this resource |
Single-Chassis Synchronization
In a single chassis, instruments may share the chassis reference clock and use backplane trigger lines to coordinate their operations. A system timing module becomes useful when the system requires a more accurate reference, programmable clock generation, advanced trigger routing or differential-star distribution.
A typical single-chassis workflow is:
- Select the master reference clock.
- Route the reference to each compatible instrument.
- Configure every instrument to derive its timebase from that reference.
- Distribute a common start or reference trigger.
- Apply instrument-specific alignment commands where required.
- Measure and verify the resulting timing relationship.
Multichassis Synchronization
Multichassis synchronization extends a common timebase and coordinated triggers across two or more PXI systems. One chassis normally acts as the master, while the other chassis receive and redistribute its clock and event signals.
The complete system may require:
- A master TCXO, OCXO or external reference source
- A compatible timing module in each chassis
- Clock and trigger cables with controlled impedance
- Matched or characterized cable lengths
- Defined backplane routes in every chassis
- Instrument-specific reference and trigger configuration
- Measurement or compensation of fixed path delays
Multichassis synchronization accuracy depends on the complete timing path. The oscillator specification alone does not include cable delay, trigger routing, chassis skew or receiving-instrument delay.
GPS, IRIG-B and IEEE 1588 Synchronization
GPS Synchronization
GPS provides a common external time reference for systems located in different places. Performance depends on antenna installation, sky visibility, cable delay, receiver state and the required holdover behavior when satellite reception is unavailable.
IRIG-B Synchronization
IRIG-B is widely used in aerospace, defense, energy and laboratory systems to distribute coded time information. Confirm the electrical format, modulation, cabling and supported IRIG implementation before integration.
IEEE 1588 Synchronization
IEEE 1588 Precision Time Protocol distributes time over an Ethernet network. Accuracy depends on the network architecture, grandmaster, switches, traffic, timestamping method and selected protocol profile.
Network time synchronization should not be assumed to provide the same low-skew sample-clock distribution as a dedicated PXI differential-star connection. Choose the method according to whether the requirement is absolute time or tightly aligned instrument clocks.
Clock Accuracy, Jitter and Skew
| Спецификация | Meaning | Why It Matters |
|---|---|---|
| Frequency Accuracy | Difference between the actual and nominal clock frequency | Determines long-term timebase and measurement-frequency error |
| Frequency Stability | How much the clock changes with time and environment | Affects drift during long acquisitions or generation sequences |
| Jitter | Short-term variation in clock-edge timing | Can degrade sampling quality and phase-noise performance |
| Skew | Difference in arrival time between timing destinations | Affects channel and instrument alignment |
| Propagation Delay | Time required for a signal to travel through a route or cable | Creates a fixed offset that may require characterization |
| Trigger Uncertainty | Variation in the relationship between trigger and clock edges | Affects repeatability of synchronized acquisitions |
Cables and External Connections
Timing cables are part of the synchronization system. Use impedance-controlled cables appropriate for the module’s electrical interface, and avoid unterminated branches or adapters that can introduce reflections.
For parallel multichassis distribution, matched cable lengths can reduce deterministic timing differences. Precision applications should measure the actual delay of each path rather than relying only on nominal cable length.
Before ordering, confirm:
- Connector type at both ends
- Required cable impedance
- Signal voltage and logic standard
- Clock or trigger frequency
- Cable length and propagation delay
- Required termination
- Splitter or distribution-amplifier requirements
- GPS antenna and antenna-cable requirements
Software and Driver Compatibility
NI PXI timing modules are primarily configured with NI-Sync. NI-Sync controls reference selection, programmable clock generation, trigger routing, PFI behavior and synchronization status.
Instrument drivers such as NI-DAQmx, NI-SCOPE, NI-FGEN, NI-RFSA, NI-RFSG and FlexRIO software configure the receiving instruments. A route created in NI-Sync is not sufficient if the destination instrument remains configured for its internal clock or a software trigger.
Before purchasing a timing module, verify:
- NI-Sync version and operating-system support
- NI PXI Platform Services compatibility
- Instrument-driver versions
- NI-TClk support where required
- LabVIEW, LabWindows/CVI or text-based API compatibility
- Real-time operating-system requirements
- Legacy application and route-name compatibility
Типичные применения
- Synchronized multichannel data acquisition
- Phase-coherent RF generation and analysis
- Multichassis digitizer and oscilloscope systems
- Coordinated arbitrary waveform generation
- Radar and electronic-warfare validation
- Semiconductor characterization and production test
- Aerospace and defense data acquisition
- Симуляция с аппаратным входом
- High-energy physics and scientific research
- Distributed event monitoring and timestamping
- GPS-disciplined laboratory measurement
- Synchronization with third-party instrumentation
Legacy Timing Module Replacement
Replacing a PXI-665x or another legacy synchronization module requires more than matching the reference-clock frequency. A newer module may use a different bus connector, system timing slot, oscillator, routing architecture, front-panel connector or driver configuration.
Compare the following before approving a replacement:
- PXI, PXI hybrid or PXI Express form factor
- System timing slot compatibility
- TCXO, OCXO or external-reference architecture
- Clock-import and clock-export capabilities
- PXI_CLK10 and PXIe_CLK100 control
- PXI trigger, star and differential-star access
- PFI quantity, connector and electrical standard
- Programmable clock ranges
- GPS, IRIG-B, PPS or IEEE 1588 support
- NI-Sync and operating-system compatibility
- Existing software route names and initialization sequence
- Cable pinout, impedance and delay
A newer timing module may improve clock stability while still requiring a different PXIe chassis, new cables and revised software. Validated systems should be requalified by measuring the final clock, trigger and phase relationships.
PXI Synchronization Procurement and RFQ Guide
Provide the following information for accurate timing-module selection and quotation:
- Required timing-module model and complete part number
- Number and model of synchronized instruments
- Number of PXI or PXIe chassis
- Exact chassis models and timing-slot locations
- Required master reference source
- Frequency, sample-clock, phase or absolute-time requirement
- Required oscillator accuracy and stability
- Clock-input and clock-output frequencies
- Trigger quantity and electrical format
- Required PXI star or PXIe differential-star routing
- GPS, IRIG-B, PPS or IEEE 1588 requirements
- Front-panel cables, splitters and adapters
- Operating system and NI-Sync version
- Instrument drivers and application software
- Required quantity and preferred product condition
For multichassis systems, provide a timing diagram showing the master source, every chassis, cable connections and receiving instruments. This is more useful than specifying only the timing-module model.
Часто задаваемые вопросы
Do modules in the same PXI chassis synchronize automatically?
No. The chassis provides clocks and trigger resources, but each instrument must support and be configured for the selected timing route. Some applications also require instrument-level phase alignment.
What is the difference between PXI-6651 and PXI-6653?
The PXI-6651 is primarily a slave module that receives external timing. The PXI-6653 includes an OCXO and clock-generation functions, making it suitable as a higher-stability master in conventional PXI systems.
What is the difference between PXIe-6672 and PXIe-6674T?
The PXIe-6672 uses a TCXO and supports general PXI Express timing. The PXIe-6674T uses a higher-accuracy OCXO and supports advanced PXI Express differential-star clock and trigger routing.
What is the PXI-6683H used for?
The PXI-6683H synchronizes PXI systems to GPS, IRIG-B, PPS and IEEE 1588 time sources. It is appropriate when events require absolute timestamps or correlation across distributed systems.
Does a shared 10 MHz reference guarantee phase alignment?
No. It keeps compatible instrument timebases at the same frequency, but start timing, divider state and internal signal paths can still create phase offsets. A coordinated trigger and instrument-specific alignment method may also be required.
What is the PXI system timing slot?
It is a dedicated chassis slot connected to star-trigger and other timing resources. Installing a timing module in this slot enables functions that may not be available from an ordinary peripheral slot.
Can one timing module synchronize multiple PXI chassis?
Yes, when compatible timing modules, clock connections and trigger routes are installed in every chassis. Cable delay and destination-instrument configuration must be included in the system design.
What is NI-TClk?
NI-TClk is an instrument-synchronization technology for supported NI modular instruments. It coordinates clocks, triggers and device delays, but it is not supported by every PXI module and does not replace all system timing hardware.
Related NI PXI Solutions
NI PXI Synchronization Modules from PXISOURCE
PXISOURCE supports engineers, laboratories, system integrators and procurement teams with PXI timing-module selection, chassis timing-slot review, clock and trigger architecture planning, cable matching and legacy synchronization-system replacement. Send the chassis models, instrument list, timing requirement and preferred hardware condition for a technically matched quotation.
Need help selecting an NI PXI synchronization module? Email sales@pxisource.com or contact PXISOURCE on WhatsApp.