PCIe-5774

PCIe-5774 12-Bit 6.4 GS/s FlexRIO Digitizer Device

The PCIe-5774 is a high-speed PCI Express FlexRIO digitizer designed for wideband time-domain measurements and custom real-time signal processing. It combines a two-channel, 12-bit analog-to-digital converter with a user-programmable Xilinx Kintex UltraScale FPGA and 4 GB of onboard DRAM.

The device simultaneously samples two analog channels at 3.2 GS/s per channel or operates in a single-channel interleaved mode at 6.4 GS/s. Depending on the selected part number, the DC-coupled analog front end provides approximately 1.6 GHz or 3 GHz of -3 dB bandwidth.

Software-selectable 200 mV peak-to-peak and 1 V peak-to-peak input ranges, adjustable DC offset, external clocking, analog triggering and FPGA-based processing make the PCIe-5774 suitable for scientific instrumentation, medical imaging, particle physics and high-speed electronic validation.

Key Features of the PCIe-5774

• Two simultaneously sampled analog input channels
• 12-bit analog input resolution
• 3.2 GS/s per channel in dual-channel mode
• 6.4 GS/s in single-channel interleaved mode
• Approximately 3 GHz or 1.6 GHz analog bandwidth options
• DC-coupled 50 Ω analog inputs
• Software-selectable 200 mVpp and 1 Vpp input ranges
• Selectable vertical DC offset
• Xilinx Kintex UltraScale KU035 or KU060 FPGA
• 4 GB of onboard DRAM
• Up to 17 GB/s theoretical DRAM bandwidth
• Eight bidirectional digital I/O channels
• Four high-speed MGT transmit and receive lanes on KU060 versions
• External 10 MHz reference-clock support
• External 3.2 GHz sample-clock support
• Dedicated analog input and digital output triggers
• PCI Express Gen 3 x8 interface
• LabVIEW FPGA and FlexRIO software support

PCIe-5774 Technical Specifications

PCIe-5774 Part Number Options

The final two digits identify the analog bandwidth variant: the -01 versions provide the higher-bandwidth front end, while the -02 versions provide approximately 1.6 GHz of bandwidth. The 785648 configurations use the KU035 FPGA, and the 785650 configurations use the larger KU060 FPGA.

Integrated FlexRIO Architecture

The PCIe-5774 is an integrated FlexRIO digitizer device. Its analog front end, ADC, Kintex UltraScale FPGA, onboard memory and PCI Express interface are installed on one double-slot PCI Express card.

It does not require a separate FlexRIO FPGA carrier module or adapter module. This distinguishes the PCIe-5774 from earlier modular FlexRIO systems in which an NI digitizer adapter module had to be paired with a separate PXI or PCIe FPGA module.

Dual-Channel 3.2 GS/s Acquisition

In dual-channel mode, both analog inputs are simultaneously sampled at 3.2 GS/s per channel. Simultaneous sampling preserves the timing relationship between the two signals and supports phase, propagation-delay and channel-correlation measurements.

Dual-channel operation is suitable for comparing input and output waveforms, monitoring two high-speed detector channels or acquiring related signals from a device under test.

Single-Channel 6.4 GS/s Interleaved Mode

In single-channel mode, the ADC cores are interleaved to produce an aggregate sample rate of 6.4 GS/s. This mode provides twice the sample density for one selected channel.

Single-channel interleaving is useful when the application prioritizes waveform time resolution over the ability to acquire two signals simultaneously. Interleaving artifacts and fixed spurs should be considered in precision spectral analysis.

12-Bit Analog Resolution

The PCIe-5774 uses a 12-bit ADC, providing 4,096 theoretical digitization levels across the selected full-scale input range. The 12-bit architecture offers greater vertical resolution than many traditional 8-bit high-speed digitizers.

Effective resolution depends on input frequency, noise, clock quality, signal amplitude and acquisition mode. FPGA processing can be used for averaging, filtering and other techniques that improve measurement repeatability.

Up to 3 GHz DC-Coupled Bandwidth

The higher-bandwidth -01 configurations provide a measured -3 dB bandwidth of approximately 3.00 GHz on the 200 mVpp range and 2.85 GHz on the 1 Vpp range.

The -02 configurations provide approximately 1.63 GHz on the 200 mVpp range and 1.62 GHz on the 1 Vpp range. The lower-bandwidth model may be preferred when the additional bandwidth of the -01 version is not required.

DC-Coupled Analog Inputs

DC coupling allows the PCIe-5774 to acquire both the alternating and steady-state components of an input waveform. This is valuable for measuring pulses, step responses, baseband signals and high-speed signals with meaningful DC content.

The analog inputs have a nominal impedance of 50 Ω. Sources, cables and fixtures should therefore be designed for a 50 Ω signal environment to minimize reflections and preserve high-frequency waveform fidelity.

Software-Selectable Input Ranges

The digitizer provides 200 mV peak-to-peak and 1 V peak-to-peak full-scale ranges. The 200 mVpp range offers greater sensitivity for smaller signals, while the 1 Vpp range accommodates larger input amplitudes.

Select the smallest range that safely contains the complete input waveform, including its DC offset and expected transient peaks. Exceeding the permitted analog input level can distort the waveform or damage the input circuitry.

Programmable Vertical Offset

A nominal vertical-offset range of ±0.5 full scale allows the acquisition window to be shifted around a DC operating point. This enables smaller variations riding on a DC level to use more of the ADC range.

For example, a waveform that does not remain centered around zero can be positioned within the 200 mVpp or 1 Vpp acquisition window without requiring external AC coupling.

Kintex UltraScale KU035 FPGA

The KU035 configurations provide 203,128 lookup tables, 1,700 DSP48 slices and 19.0 Mb of embedded block RAM. This FPGA is appropriate for finite acquisition, triggering, data reduction and many real-time processing algorithms.

Select the KU035 when the application does not require the larger processing capacity or high-speed serial transceivers available with the KU060.

Kintex UltraScale KU060 FPGA

The KU060 configurations provide 331,680 lookup tables, 2,760 DSP48 slices and 38.0 Mb of embedded block RAM. The additional resources support larger filters, more parallel processing paths and more complex custom measurement logic.

KU060 devices also provide four high-speed transmitter lanes and four receiver lanes through the auxiliary connector. These multi-gigabit transceivers operate at nominal data rates from 500 Mb/s to 16.375 Gb/s.

Real-Time FPGA Signal Processing

The onboard FPGA can process digitized samples before data is transferred to the host computer. Possible FPGA functions include digital filtering, averaging, threshold detection, waveform classification, decimation and custom triggering.

Processing data close to the ADC can reduce host bandwidth requirements and response latency. The FPGA can identify an event, extract the required information and transfer only relevant data instead of continuously streaming every raw sample.

4 GB Onboard DRAM

The PCIe-5774 contains 4 GB of DRAM divided into two 2 GB banks. The memory provides temporary storage for high-speed acquisitions and FPGA processing.

The theoretical total memory data rate is 17 GB/s, or 8.5 GB/s per bank. Actual application throughput depends on the FPGA design, access pattern, PCI Express transfers and host-system performance.

PCI Express Gen 3 x8 Interface

The device uses a PCI Express Gen 3 x8 card-edge interface and can be installed in a compatible x8 or x16 PCI Express slot. The interface supports high-throughput communication between the FPGA, onboard memory and host application.

The computer must also provide sufficient physical clearance, power and cooling. The PCIe-5774 is a double-slot, three-quarter-length card with a maximum total power requirement of 75 W.

Reference and Sample Clock Options

The default internal sample clock locks to an onboard voltage-controlled temperature-compensated oscillator. The onboard reference timebase has a stated stability of ±0.5 ppm.

The PCIe-5774 can also lock to a 10 MHz reference delivered through the baseboard or front-panel REF/CLK IN connector. Alternatively, a 3.2 GHz external sample clock can be supplied directly through REF/CLK IN.

External clock amplitude, frequency accuracy, duty cycle and jitter must satisfy the official specifications. Poor clock quality directly reduces the achievable signal-to-noise ratio in high-frequency measurements.

85 fs RMS Sample-Clock Jitter

The specified measured sample-clock jitter is 85 fs RMS under the documented integration conditions. Low clock jitter is important when digitizing high-frequency input signals because sampling uncertainty reduces effective signal-to-noise performance.

The complete clock path should use low-phase-noise sources, high-quality 50 Ω cables and properly terminated connections.

Analog Trigger Input

A dedicated DC-coupled SMA analog trigger input supports a ±5 V input range and a 12-bit comparator threshold. The minimum trigger pulse width is 5 ns.

The analog trigger can initiate acquisition based on an external event without consuming either primary analog input. The FPGA can implement additional custom trigger qualifications when more complex behavior is required.

Digital Trigger Output

The front-panel digital trigger output uses 3.3 V CMOS logic through an SMA connector. It provides up to 24 mA of current drive and can communicate acquisition or FPGA events to external instruments.

Trigger output timing can be incorporated into custom FPGA logic for coordinating signal generators, oscilloscopes, lasers, cameras and other test equipment.

Eight Bidirectional Digital I/O Channels

The auxiliary Nano-Pitch connector provides eight single-ended bidirectional digital I/O channels. Supported voltage families include 3.3 V, 2.5 V, 1.8 V, 1.5 V and 1.2 V.

These channels can be used for low-speed control, status monitoring, custom triggering and communication with external digital circuits. The configured FPGA I/O voltage must match the connected equipment.

High-Speed Serial MGT Interface

PCIe-5774 versions equipped with the KU060 FPGA provide four high-speed serial transmit channels and four receive channels through the auxiliary interface.

The transceivers can support custom high-speed data links with nominal line rates from 500 Mb/s to 16.375 Gb/s. Implementing an MGT interface requires suitable FPGA logic, protocol design, signal-integrity analysis and compatible external hardware.

Typical PCIe-5774 Applications

• Wideband time-domain measurements
• Scientific instrumentation
• Particle-physics experiments
• Medical and ultrasound imaging
• High-speed detector acquisition
• Transient and pulse characterization
• Time-of-flight measurements
• High-speed electronic validation
• Custom digital filtering
• Real-time event detection
• FPGA-based data reduction
• Automated research systems
• Multi-channel waveform correlation
• Custom triggering and synchronization

Scientific Instrumentation

The PCIe-5774 can acquire fast detector and sensor signals while implementing custom event detection in the FPGA. Its DC coupling preserves low-frequency and steady-state information that would be removed by an AC-coupled front end.

Onboard processing can perform filtering, pulse integration, peak detection or event qualification before transferring results to the host computer.

Medical Imaging

The combination of multi-gigasample acquisition and FPGA processing supports research applications involving ultrasound, optical detection and other high-speed imaging techniques.

The PCIe-5774 is a measurement component rather than a certified medical diagnostic system. Any medical application must be designed and validated according to the applicable safety, regulatory and system-level requirements.

Particle Physics and Detector Readout

Fast detector pulses can be captured using the 3.2 GS/s dual-channel mode or the 6.4 GS/s interleaved mode. FPGA logic can identify events, calculate pulse properties and reduce the amount of raw data sent to the host.

The analog trigger input and external clock options help synchronize acquisition with experimental timing systems.

High-Speed Electronic Validation

The PCIe-5774 can measure pulse shape, propagation delay, overshoot, ringing and other time-domain characteristics of high-speed circuits. Dual-channel simultaneous sampling allows direct comparison of two related signals.

Careful fixture design is required at gigahertz frequencies. Use controlled-impedance cables, minimize adapters and maintain proper 50 Ω termination throughout the signal path.

Finite Acquisition Support

The FlexRIO driver includes finite-acquisition support for capturing a defined number of samples around a trigger event. This provides a faster starting point than developing every acquisition function directly in FPGA code.

Custom FPGA development remains available when the application requires specialized triggering, continuous processing or nonstandard data movement.

LabVIEW FPGA Programming

LabVIEW FPGA can be used to implement custom signal-processing and control logic on the Kintex UltraScale FPGA. Engineers can create deterministic algorithms that operate on the high-throughput sample stream.

FPGA compilation is required after changing the FPGA design. Compilation time and resource use depend on algorithm complexity, parallelism and the selected KU035 or KU060 target.

FlexRIO Driver Support

The PCIe-5774 is supported through the NI FlexRIO driver. The driver provides device communication, finite acquisition support, FPGA interaction and access to relevant examples and documentation.

Before installing the device, confirm operating-system, LabVIEW, LabVIEW FPGA and FlexRIO driver compatibility. FPGA source code developed for another FlexRIO model may require modification because channel count, data width and I/O resources differ.

Host Computer Requirements

The host computer requires an available PCI Express x8 or x16 slot with sufficient electrical lanes. The enclosure must accommodate a standard-height, double-slot, three-quarter-length card.

The card includes an integrated fan, but the computer must still provide unobstructed inlet and exhaust airflow. The local air temperature at the card’s fan inlet must remain within the 0°C to 45°C operating range.

PCIe-5774 Troubleshooting

The PCIe-5774 is not detected

Confirm that the card is fully inserted into a compatible PCI Express x8 or x16 slot. Check auxiliary power requirements, computer firmware settings, FlexRIO driver installation and operating-system compatibility.

The computer cannot accommodate the card

Verify that the chassis supports a standard-height, three-quarter-length, double-slot PCI Express card. Remove adjacent obstructions and confirm that the slot provides sufficient PCI Express lanes and cooling.

The input waveform is clipped

Select the 1 Vpp range or reduce the input amplitude. Check the programmed vertical offset and include all DC and transient signal components when calculating the required input range.

The acquired waveform contains reflections

Verify that the source, cable, connectors and digitizer input use a consistent 50 Ω impedance. Shorten the signal path and remove unsuitable adapters or unterminated branches.

The measured bandwidth is lower than expected

Confirm whether the installed device is a -01 or -02 bandwidth variant. Check the selected voltage range, cable bandwidth, source impedance, fixture response and external signal-conditioning components.

Only one channel reaches 6.4 GS/s

This is expected. The 6.4 GS/s rate is available in single-channel interleaved mode. Dual-channel mode samples both channels at 3.2 GS/s per channel.

An external reference clock does not lock

Verify that the reference is 10 MHz, within the required accuracy, amplitude and duty-cycle limits, and connected to REF/CLK IN through a suitable 50 Ω cable.

An external sample clock does not work

Confirm that the supplied sample clock is 3.2 GHz and satisfies the REF/CLK IN amplitude, duty-cycle and jitter requirements. A 10 MHz reference and a 3.2 GHz sample clock use different clock configurations.

The FPGA design does not fit

Reduce resource usage or parallelism, optimize memory and DSP implementation, or select a PCIe-5774 version with the larger KU060 FPGA.

High-speed serial channels are unavailable

The MGT channels are available only on PCIe-5774 configurations equipped with the KU060 FPGA. KU035 versions provide the standard digital I/O interface but not the MGT capability.

The device overheats or stops operating

Check the integrated fan, adjacent-slot clearance and computer airflow. Ensure that cables do not block the air inlet or exhaust and that the local fan-inlet temperature remains below 45°C.

PCIe-5774 Comparison with Similar FlexRIO Digitizers

PCIe-5774 vs PCIe-5775

The PCIe-5774 is DC coupled and provides bandwidth options of approximately 1.6 GHz or 3 GHz. The PCIe-5775 is AC coupled and provides substantially higher analog bandwidth for RF and frequency-domain measurements.

Choose the PCIe-5774 when the DC content, pulse baseline or low-frequency behavior of the signal must be preserved. Choose the PCIe-5775 when higher RF bandwidth is more important and AC coupling is acceptable.

PCIe-5774 vs PCIe-5764

The PCIe-5774 provides two 12-bit inputs with a maximum aggregate rate of 6.4 GS/s. The PCIe-5764 provides four 16-bit inputs with a lower maximum rate of 1 GS/s per channel.

Select the PCIe-5774 for faster signals and wider time-domain bandwidth. Select the PCIe-5764 when four channels and higher vertical resolution are more important.

PCIe-5774 vs PXIe-5774

Both models provide similar high-speed digitizer and FPGA capabilities. The PCIe-5774 installs directly in a compatible computer, while the PXIe-5774 installs in a PXI Express chassis.

Choose the PCIe model for a workstation-based custom instrument. Choose the PXIe-5774 when PXI triggering, modular instrumentation and chassis-based system integration are required.

Recommended Related Products

• PXIe-5774 12-Bit 6.4 GS/s FlexRIO Digitizer
• PCIe-5775 12-Bit 6.4 GS/s AC-Coupled FlexRIO Digitizer
• PXIe-5775 12-Bit 6.4 GS/s FlexRIO Digitizer
• PCIe-5764 16-Bit 1 GS/s FlexRIO Digitizer
• PCIe-5763 16-Bit 500 MS/s FlexRIO Digitizer
• View More NI FlexRIO Products
• View More NI PCI and USB Data Acquisition Products

Selecting the Right PCIe-5774 Configuration

Choose an -01 part number when the application needs the maximum available DC-coupled analog bandwidth. Select an -02 part number when approximately 1.6 GHz of bandwidth is sufficient.

Choose the KU035 FPGA for standard acquisition and processing tasks. Select the KU060 when the design requires additional lookup tables, DSP resources, block RAM or high-speed MGT connectivity.

Why Choose the PCIe-5774?

• Captures two channels simultaneously at 3.2 GS/s
• Provides 6.4 GS/s single-channel interleaved acquisition
• Offers 12-bit vertical resolution
• Preserves DC and low-frequency signal content
• Provides selectable 200 mVpp and 1 Vpp ranges
• Offers bandwidth options for different measurement requirements
• Integrates a programmable Kintex UltraScale FPGA
• Includes 4 GB of high-speed onboard memory
• Supports custom real-time processing and triggering
• Provides external reference and sample-clock inputs
• Supports auxiliary digital I/O and optional MGT links
• Connects directly through PCI Express Gen 3 x8

Frequently Asked Questions

What is the PCIe-5774?

The PCIe-5774 is a two-channel, 12-bit PCI Express FlexRIO digitizer with up to 6.4 GS/s sampling, DC coupling and an integrated programmable FPGA.

How many analog input channels does it provide?

It provides two single-ended, simultaneously sampled analog input channels.

What is the maximum sample rate?

The maximum rate is 6.4 GS/s in single-channel interleaved mode. In dual-channel mode, each channel operates at 3.2 GS/s.

What is the analog input bandwidth?

The -01 versions provide approximately 3 GHz of -3 dB bandwidth, while the -02 versions provide approximately 1.6 GHz.

What input ranges are available?

The software-selectable full-scale input ranges are 200 mV peak-to-peak and 1 V peak-to-peak.

Are the analog inputs AC or DC coupled?

The primary analog inputs are DC coupled with a nominal impedance of 50 Ω.

Which FPGA options are available?

The PCIe-5774 is available with a Xilinx Kintex UltraScale KU035 or KU060 FPGA.

What is the difference between the KU035 and KU060 versions?

The KU060 provides more logic, DSP slices and block RAM. It also supports four high-speed MGT transmit lanes and four receive lanes, which are unavailable on the KU035 versions.

How much onboard memory does the PCIe-5774 include?

It includes 4 GB of DRAM divided into two 2 GB memory banks.

Does the PCIe-5774 require a separate FlexRIO FPGA carrier?

No. It is an integrated FlexRIO digitizer containing the ADC, FPGA, onboard memory and PCI Express interface on one card.

Can the PCIe-5774 use an external clock?

Yes. It can accept a 10 MHz external reference clock or a 3.2 GHz external sample clock through the REF/CLK IN SMA connector.

Which PCI Express slots are compatible?

The card uses a PCI Express Gen 3 x8 interface and can be installed in compatible x8 or x16 slots.

How much computer space does it require?

It is a standard-height, three-quarter-length, double-slot card. The host computer must provide two-slot clearance and sufficient airflow.

What are the PCIe-5774 part numbers?

The available part numbers are 785648-01, 785648-02, 785650-01 and 785650-02. They differ by FPGA size and analog bandwidth.

Which software controls the PCIe-5774?

The device uses the NI FlexRIO driver and supports custom FPGA development with LabVIEW FPGA.

Request a Quote for the PCIe-5774

Contact us for current availability, lead time and project pricing for the PCIe-5774 12-Bit 6.4 GS/s FlexRIO Digitizer Device. Please provide the required bandwidth and FPGA option so we can confirm the correct part number for your application.