{"id":797,"count":2,"description":"<div class=\"category-introduction ni-max-guide\">\r\n  <h2>NI PXI Semiconductor Test Instruments<\/h2>\r\n\r\n  <div class=\"intro-box\">\r\n    <p>NI PXI Semiconductor Test instruments provide ATE-class digital pattern generation, response comparison, per-pin parametric measurement and multisite execution within a modular PXI Express platform. They are designed for semiconductor characterization, validation and production testing of digital and mixed-signal integrated circuits.<\/p>\r\n\r\n    <p>The PXI Semiconductor Test category currently includes the PXIe-6570 and PXIe-6571 Digital Pattern Instruments. These modules combine programmable digital pin electronics, vector-based pattern execution, hardware comparison, source and capture resources, frequency measurement and per-pin parametric measurement capabilities.<\/p>\r\n  <\/div>\r\n\r\n  <h3>What Is a PXI Digital Pattern Instrument?<\/h3>\r\n\r\n  <p>A PXI Digital Pattern Instrument applies programmed logic states to a semiconductor device and compares the DUT response with expected values at defined timing points. Unlike basic static digital I\/O, it provides per-pin voltage levels, precise edge placement, vector sequencing, hardware pass\/fail comparison and debugging resources designed specifically for semiconductor testing.<\/p>\r\n\r\n  <p>Each digital channel can be assigned to a logical DUT pin through a pin map. Engineers can then define voltage levels, timing sets, pattern files, specifications and test flows without rewriting the hardware interface for every test.<\/p>\r\n\r\n  <p>Typical digital semiconductor tests include:<\/p>\r\n\r\n  <ul>\r\n    <li>Functional verification of digital interfaces<\/li>\r\n    <li>Digital communication protocol testing<\/li>\r\n    <li>Input and output voltage characterization<\/li>\r\n    <li>Timing and frequency characterization<\/li>\r\n    <li>Continuity, leakage and parametric measurements<\/li>\r\n    <li>Scan-pattern execution and design-for-test validation<\/li>\r\n    <li>Multisite production testing<\/li>\r\n    <li>Mixed-signal IC digital subsystem testing<\/li>\r\n  <\/ul>\r\n\r\n  <h3>PXI Semiconductor Test System Functions<\/h3>\r\n\r\n  <div class=\"table-wrap\">\r\n    <table>\r\n      <thead>\r\n        <tr>\r\n          <th>Test Function<\/th>\r\n          <th>Typical PXI Instrument<\/th>\r\n          <th>Purpose<\/th>\r\n          <th>Selection Factors<\/th>\r\n        <\/tr>\r\n      <\/thead>\r\n      <tbody>\r\n        <tr>\r\n          <td>Digital Functional Test<\/td>\r\n          <td>Digital Pattern Instrument<\/td>\r\n          <td>Drives digital patterns and compares DUT responses in hardware<\/td>\r\n          <td>Channel count, vector rate, timing accuracy, voltage range and pattern memory<\/td>\r\n        <\/tr>\r\n        <tr>\r\n          <td>Per-Pin Parametric Test<\/td>\r\n          <td>Integrated PPMU<\/td>\r\n          <td>Forces or measures voltage and current on individual digital pins<\/td>\r\n          <td>Force range, measurement range, accuracy, compliance and bank architecture<\/td>\r\n        <\/tr>\r\n        <tr>\r\n          <td>Precision DC Characterization<\/td>\r\n          <td>Source Measure Unit<\/td>\r\n          <td>Measures device leakage, I-V characteristics and power-rail behavior<\/td>\r\n          <td>Voltage, current, sensitivity, channel density, pulse capability and settling time<\/td>\r\n        <\/tr>\r\n        <tr>\r\n          <td>RF and Mixed-Signal Test<\/td>\r\n          <td>VST, signal generator, analyzer or digitizer<\/td>\r\n          <td>Generates and analyzes RF or analog signals<\/td>\r\n          <td>Frequency, bandwidth, dynamic range, synchronization and calibration plane<\/td>\r\n        <\/tr>\r\n        <tr>\r\n          <td>Signal Routing<\/td>\r\n          <td>PXI Switch Module<\/td>\r\n          <td>Connects shared instruments to multiple DUT pins or test sites<\/td>\r\n          <td>Topology, voltage, current, bandwidth, leakage and switching life<\/td>\r\n        <\/tr>\r\n        <tr>\r\n          <td>System Synchronization<\/td>\r\n          <td>PXI Timing Module<\/td>\r\n          <td>Distributes clocks and triggers across instruments or digital subsystems<\/td>\r\n          <td>Clock accuracy, trigger routing, skew and multichassis requirements<\/td>\r\n        <\/tr>\r\n      <\/tbody>\r\n    <\/table>\r\n  <\/div>\r\n\r\n  <div class=\"note-box\">\r\n    <p>This category contains the dedicated PXIe-6570 and PXIe-6571 Digital Pattern Instruments. SMUs, RF instruments, switches and DMMs used to complete a semiconductor test system remain in their respective PXI product categories to avoid assigning the same model to multiple categories.<\/p>\r\n  <\/div>\r\n\r\n  <h3>PXIe-6570 and PXIe-6571 Comparison<\/h3>\r\n\r\n  <div class=\"table-wrap\">\r\n    <table>\r\n      <thead>\r\n        <tr>\r\n          <th>\u041c\u043e\u0434\u0435\u043b\u044c<\/th>\r\n          <th>Unique Category<\/th>\r\n          <th>Core Architecture<\/th>\r\n          <th>Best Fit<\/th>\r\n        <\/tr>\r\n      <\/thead>\r\n      <tbody>\r\n        <tr>\r\n          <td><a class=\"product-link\" href=\"https:\/\/pxisource.com\/ru\/product\/pxie-6570\/\">PXIe-6570<\/a><\/td>\r\n          <td>Two-Slot Digital Pattern Instrument<\/td>\r\n          <td>32 bidirectional digital channels, two-slot PXIe form factor, 100 MVector\/s maximum vector rate, 128M-vector memory per channel and up to 256 channels in one digital subsystem<\/td>\r\n          <td>Existing PXIe-6570 test programs, established semiconductor platforms and 32-channel digital functional test<\/td>\r\n        <\/tr>\r\n        <tr>\r\n          <td><a class=\"product-link\" href=\"https:\/\/pxisource.com\/ru\/product\/%d0%bf%d0%ba%d1%81%d0%b8%d0%b5-6571\/\">PXIe-6571<\/a><\/td>\r\n          <td>High-Density Digital Pattern Instrument<\/td>\r\n          <td>8- or 32-channel variants, one-slot PXIe form factor, 100 MVector\/s maximum vector rate, 128M-vector memory per channel and up to 512 channels with 32-channel modules<\/td>\r\n          <td>High-density digital subsystems, multisite testing and new semiconductor characterization or production platforms<\/td>\r\n        <\/tr>\r\n      <\/tbody>\r\n    <\/table>\r\n  <\/div>\r\n\r\n  <p>Both instruments support semiconductor functional, timing, voltage and parametric testing. Their common 100 MHz maximum vector rate does not make them interchangeable: physical width, channel variants, subsystem scalability, cooling requirements, supported revisions and synchronization architecture must also be considered.<\/p>\r\n\r\n  <h3>How to Select a PXI Semiconductor Test Instrument<\/h3>\r\n\r\n  <h4>1. Calculate the Required Digital Channel Count<\/h4>\r\n\r\n  <p>Count every DUT pin that must be driven, compared or measured during the test. Include control pins, communication interfaces, clocks, scan pins, resets, interrupts and spare channels required for future device revisions.<\/p>\r\n\r\n  <p>The PXIe-6570 provides 32 digital channels and occupies two PXIe slots. The PXIe-6571 is available in 8-channel and 32-channel configurations and occupies one slot. The PXIe-6571 therefore offers greater channel density when building large digital subsystems.<\/p>\r\n\r\n  <p>For multisite testing, calculate the channels required per DUT and multiply by the maximum number of sites that will run in parallel. Do not use only the package pin count because power, ground, analog and unused pins may not require digital pattern channels.<\/p>\r\n\r\n  <h4>2. Define Logic Voltage and Parametric Requirements<\/h4>\r\n\r\n  <p>Confirm the DUT logic families, nominal supply voltage, input thresholds, output levels and allowable pin voltage. Both instrument families provide programmable digital levels and per-pin parametric measurement resources, but the test limits must remain within the supported voltage and current ranges.<\/p>\r\n\r\n  <p>Determine whether the test requires:<\/p>\r\n\r\n  <ul>\r\n    <li>Programmable drive-high and drive-low levels<\/li>\r\n    <li>Programmable compare-high and compare-low thresholds<\/li>\r\n    <li>Active-load or termination behavior<\/li>\r\n    <li>Force-voltage and measure-current operation<\/li>\r\n    <li>Force-current and measure-voltage operation<\/li>\r\n    <li>Continuity, leakage or open\/short testing<\/li>\r\n    <li>DUT Ground Sense for improved accuracy at higher currents<\/li>\r\n  <\/ul>\r\n\r\n  <p>The integrated PPMU is useful for pin-level measurements, but it is not a replacement for a precision SMU when the application requires lower-current sensitivity, higher source power, four-quadrant operation or specialized pulsing.<\/p>\r\n\r\n  <h4>3. Determine the Required Vector Rate<\/h4>\r\n\r\n  <p>Vector rate defines how quickly the instrument executes pattern vectors. Both PXIe-6570 and PXIe-6571 support maximum vector rates of 100 MVector\/s, corresponding to a minimum standard vector period of 10 ns.<\/p>\r\n\r\n  <p>The effective digital data rate can also depend on edge-multiplier mode, pattern format, pulse-width requirements and the selected timing edges. Maximum vector rate should not be treated as a guarantee that every voltage, edge or pattern configuration can operate at the maximum speed.<\/p>\r\n\r\n  <p>For protocol testing, calculate timing from the complete transaction rather than selecting an instrument only from the interface clock frequency. Setup time, hold time, edge placement, turnaround cycles and response latency can all affect the required pattern configuration.<\/p>\r\n\r\n  <h4>4. Evaluate Timing Accuracy and Edge Placement<\/h4>\r\n\r\n  <p>Digital semiconductor characterization often requires sweeping an input edge or compare strobe relative to a DUT response. These measurements are used to determine setup time, hold time, propagation delay and timing margin.<\/p>\r\n\r\n  <p>Review vector-period resolution, edge-placement resolution, drive and compare accuracy and timing repeatability. The required instrument timing accuracy should be small enough relative to the DUT specification and production guard band.<\/p>\r\n\r\n  <p>Timing resolution and timing accuracy are different specifications. A very small programmable timing step does not mean the actual edge has the same absolute accuracy.<\/p>\r\n\r\n  <h4>5. Plan Multisite Test Architecture<\/h4>\r\n\r\n  <p>Multisite testing applies the same test flow to several DUTs in parallel. It can improve production throughput, but the complete system must have sufficient digital channels, source and capture resources, DC channels, RF paths, switching and fixture connections for every site.<\/p>\r\n\r\n  <p>Both PXIe-6570 and PXIe-6571 provide resources for up to eight test sites per digital pattern instrument. The practical site count depends on the number of digital pins required by each DUT and whether resources can be shared safely between sites.<\/p>\r\n\r\n  <p>When evaluating multisite efficiency, consider:<\/p>\r\n\r\n  <ul>\r\n    <li>Number of DUT pins per site<\/li>\r\n    <li>Shared and site-specific power rails<\/li>\r\n    <li>Pattern branching and per-site pass\/fail behavior<\/li>\r\n    <li>PPMU bank organization<\/li>\r\n    <li>Source, capture and history RAM resources<\/li>\r\n    <li>Fixture and device interface board layout<\/li>\r\n    <li>Handler or prober communication<\/li>\r\n    <li>Test time added by serial operations<\/li>\r\n  <\/ul>\r\n\r\n  <h4>6. Review Pattern and History Memory<\/h4>\r\n\r\n  <p>Digital pattern instruments store compiled vectors in onboard memory. Both product families provide 128M vectors of large vector memory per channel. Actual pattern capacity depends on the compiled pattern structure, opcodes, source and capture data and scan-pattern implementation.<\/p>\r\n\r\n  <p>History RAM records information around failures to support debugging. When testing multiple sites, history resources may be divided among the active sites, reducing the number of retained cycles per site.<\/p>\r\n\r\n  <p>Large scan-test patterns should be evaluated before the system is finalized. Supported scan opcodes can reduce the vector-memory requirement for long serial scan operations, but compression depends on the number and arrangement of scan input and output pins.<\/p>\r\n\r\n  <h4>7. Confirm Synchronization Requirements<\/h4>\r\n\r\n  <p>Multiple Digital Pattern Instruments can be synchronized to create a larger digital subsystem. This may require compatible module types, matching channel configurations, suitable chassis slots and a supported timing module.<\/p>\r\n\r\n  <p>PXIe-6570 and PXIe-6571 should not be assumed to form one synchronized digital subsystem together. NI synchronization configurations require compatible instruments, and PXIe-6571 modules used in a group must have matching channel counts.<\/p>\r\n\r\n  <p>For systems combining digital pattern, SMU, RF and analog instruments, define whether the instruments only need a common start trigger or require phase-related clocks and precisely aligned events.<\/p>\r\n\r\n  <h4>8. Check Chassis Power and Cooling<\/h4>\r\n\r\n  <p>The PXIe-6571 has high power and cooling requirements despite its one-slot form factor. The 8-channel version requires a chassis with at least 58 W slot cooling, while the 32-channel version requires 82 W slot cooling under its specified operating conditions.<\/p>\r\n\r\n  <p>This requirement can limit the compatible chassis models. A suitable configuration may use the <a class=\"product-link\" href=\"https:\/\/pxisource.com\/ru\/product\/pxie-1092\/\">PXIe-1092<\/a> for a compact high-power system or the <a class=\"product-link\" href=\"https:\/\/pxisource.com\/ru\/product\/%d0%bf%d1%8c%d0%b5-1095\/\">PXIe-1095<\/a> when more instrument capacity is required.<\/p>\r\n\r\n  <p>For the PXIe-6570, verify the selected chassis, fan setting, available adjacent slot and total system power. The chassis fan must be configured according to the instrument specifications.<\/p>\r\n\r\n  <h4>9. Design the DUT Interface<\/h4>\r\n\r\n  <p>The digital pattern module is only one part of the signal path. Semiconductor testing normally requires compatible cables and a device interface board that connects instrument channels to the DUT socket, probe card or production handler interface.<\/p>\r\n\r\n  <p>Interface design should address:<\/p>\r\n\r\n  <ul>\r\n    <li>Pin mapping and connector compatibility<\/li>\r\n    <li>Controlled impedance and return paths<\/li>\r\n    <li>Trace length and channel-to-channel skew<\/li>\r\n    <li>Grounding and DUT Ground Sense<\/li>\r\n    <li>Protection against overvoltage and electrostatic discharge<\/li>\r\n    <li>Relay and switching parasitics<\/li>\r\n    <li>Socket, probe and fixture contact resistance<\/li>\r\n    <li>Calibration and maintenance access<\/li>\r\n  <\/ul>\r\n\r\n  <p>A poor device interface board can reduce signal integrity and measurement accuracy even when the digital instrument meets the required specification.<\/p>\r\n\r\n  <h3>PXIe-6570 or PXIe-6571?<\/h3>\r\n\r\n  <div class=\"table-wrap\">\r\n    <table>\r\n      <thead>\r\n        <tr>\r\n          <th>Selection Requirement<\/th>\r\n          <th>PXIe-6570 Direction<\/th>\r\n          <th>PXIe-6571 Direction<\/th>\r\n        <\/tr>\r\n      <\/thead>\r\n      <tbody>\r\n        <tr>\r\n          <td>Existing Validated Test Program<\/td>\r\n          <td>Appropriate when the existing platform was developed and qualified with PXIe-6570<\/td>\r\n          <td>Migration requires checking fixtures, synchronization, software and requalification<\/td>\r\n        <\/tr>\r\n        <tr>\r\n          <td>Slots per 32 Channels<\/td>\r\n          <td>Two PXIe slots<\/td>\r\n          <td>One PXIe slot<\/td>\r\n        <\/tr>\r\n        <tr>\r\n          <td>Available Channel Variants<\/td>\r\n          <td>32 channels<\/td>\r\n          <td>8 or 32 channels<\/td>\r\n        <\/tr>\r\n        <tr>\r\n          <td>Maximum Digital Subsystem Size<\/td>\r\n          <td>Up to 256 channels<\/td>\r\n          <td>Up to 512 channels with 32-channel modules<\/td>\r\n        <\/tr>\r\n        <tr>\r\n          <td>New High-Density Platform<\/td>\r\n          <td>Lower channel density<\/td>\r\n          <td>Preferred when one-slot density and larger channel scalability are required<\/td>\r\n        <\/tr>\r\n        <tr>\r\n          <td>Chassis Cooling<\/td>\r\n          <td>Verify chassis compatibility and required fan configuration<\/td>\r\n          <td>At least 58 W for 8-channel or 82 W for 32-channel operation<\/td>\r\n        <\/tr>\r\n      <\/tbody>\r\n    <\/table>\r\n  <\/div>\r\n\r\n  <div class=\"note-box\">\r\n    <p>Do not select the PXIe-6571 only because it occupies fewer slots. Its high per-slot cooling requirement must be checked against the exact chassis model. A physically open PXIe slot may not provide sufficient power and cooling.<\/p>\r\n  <\/div>\r\n\r\n  <h3>Building a Complete PXI Semiconductor Test System<\/h3>\r\n\r\n  <h4>Digital Functional Test<\/h4>\r\n\r\n  <p>The PXIe-6570 or PXIe-6571 executes digital patterns, applies programmed voltage levels, compares DUT responses and performs per-pin measurements. This forms the digital subsystem of the test platform.<\/p>\r\n\r\n  <h4>Power and DC Parametric Measurement<\/h4>\r\n\r\n  <p><a class=\"product-link\" href=\"https:\/\/pxisource.com\/ru\/product-category\/%d0%bd%d0%b8\/pxi-%d1%81%d0%b8%d1%81%d1%82%d0%b5%d0%bc%d1%81\/%d0%bc%d0%be%d0%b4%d1%83%d0%bb%d0%b8-pxi\/pxi-programmable-power-supplies-smu\/\">PXI power supplies and SMUs<\/a> provide DUT power, supply-current measurement, I-V sweeps, leakage testing and precision DC characterization. Select them according to voltage, current, sensitivity, pulsing and channel-density requirements.<\/p>\r\n\r\n  <h4>Signal Routing<\/h4>\r\n\r\n  <p><a class=\"product-link\" href=\"https:\/\/pxisource.com\/ru\/product-category\/%d0%bd%d0%b8\/pxi-%d1%81%d0%b8%d1%81%d1%82%d0%b5%d0%bc%d1%81\/%d0%bc%d0%be%d0%b4%d1%83%d0%bb%d0%b8-pxi\/pxi-switches\/\">PXI switch modules<\/a> can route shared instruments between DUT pins or test sites. Switching must be evaluated for leakage, contact resistance, bandwidth, voltage, current and settling time.<\/p>\r\n\r\n  <h4>RF and Mixed-Signal Testing<\/h4>\r\n\r\n  <p>RF front ends, transceivers, wireless ICs and mixed-signal devices may require <a class=\"product-link\" href=\"https:\/\/pxisource.com\/ru\/product-category\/%d0%bd%d0%b8\/pxi-%d1%81%d0%b8%d1%81%d1%82%d0%b5%d0%bc%d1%81\/%d0%bc%d0%be%d0%b4%d1%83%d0%bb%d0%b8-pxi\/pxi-rf-and-wireless-test\/\">PXI RF and wireless instruments<\/a>, oscilloscopes, digitizers or signal generators in addition to digital pattern hardware.<\/p>\r\n\r\n  <h4>Precision Measurements<\/h4>\r\n\r\n  <p><a class=\"product-link\" href=\"https:\/\/pxisource.com\/ru\/product-category\/%d0%bd%d0%b8\/pxi-%d1%81%d0%b8%d1%81%d1%82%d0%b5%d0%bc%d1%81\/%d0%bc%d0%be%d0%b4%d1%83%d0%bb%d0%b8-pxi\/pxi-digital-multimeters\/\">\u0426\u0438\u0444\u0440\u043e\u0432\u044b\u0435 \u043c\u0443\u043b\u044c\u0442\u0438\u043c\u0435\u0442\u0440\u044b PXI<\/a> can provide additional voltage, resistance and current measurements when the required function or accuracy is outside the integrated PPMU capability.<\/p>\r\n\r\n  <h3>Software for PXI Semiconductor Test<\/h3>\r\n\r\n  <p>The PXIe-6570 and PXIe-6571 use the NI-Digital Pattern Driver. Digital Pattern Editor provides an interactive environment for creating and debugging pin maps, specifications, levels, timing sets, patterns and test configurations.<\/p>\r\n\r\n  <p>Common software functions include:<\/p>\r\n\r\n  <ul>\r\n    <li>Pin and channel mapping<\/li>\r\n    <li>Digital level and timing configuration<\/li>\r\n    <li>Pattern compilation and execution<\/li>\r\n    <li>Shmoo plotting for voltage and timing characterization<\/li>\r\n    <li>Digital scope and pin-state debugging<\/li>\r\n    <li>History RAM failure analysis<\/li>\r\n    <li>Source and capture waveform configuration<\/li>\r\n    <li>Per-site result and pass\/fail handling<\/li>\r\n  <\/ul>\r\n\r\n  <p>Automated applications can use supported LabVIEW, C or .NET APIs. TestStand can coordinate digital pattern execution with SMUs, RF instruments, switching, handlers and reporting as part of a production test sequence.<\/p>\r\n\r\n  <p>Before purchasing hardware for an existing system, confirm the required NI-Digital Pattern Driver version, Digital Pattern Editor version, operating system and application-development environment.<\/p>\r\n\r\n  <h3>Typical Semiconductor Applications<\/h3>\r\n\r\n  <ul>\r\n    <li>Digital and mixed-signal IC characterization<\/li>\r\n    <li>Power management IC validation<\/li>\r\n    <li>RF front-end and wireless IC testing<\/li>\r\n    <li>Microcontroller and system-on-chip functional test<\/li>\r\n    <li>Sensor and interface IC validation<\/li>\r\n    <li>Digital communication protocol testing<\/li>\r\n    <li>Memory and scan-pattern execution<\/li>\r\n    <li>Wafer-level engineering characterization<\/li>\r\n    <li>Multisite packaged-device production test<\/li>\r\n    <li>Device qualification and regression testing<\/li>\r\n  <\/ul>\r\n\r\n  <h3>Legacy System Replacement<\/h3>\r\n\r\n  <p>Replacing a PXIe-6570 with a PXIe-6571 is not automatically a drop-in hardware change. Although both families support similar digital pattern concepts, they differ in slot width, channel configurations, subsystem scalability, power and cooling requirements and supported synchronization groupings.<\/p>\r\n\r\n  <p>Review the following before migrating:<\/p>\r\n\r\n  <ul>\r\n    <li>Existing pin maps, levels, timing sets and pattern files<\/li>\r\n    <li>NI-Digital Pattern Driver and software versions<\/li>\r\n    <li>Digital Pattern Editor project compatibility<\/li>\r\n    <li>Cable and device interface board connections<\/li>\r\n    <li>Chassis slot power and cooling capability<\/li>\r\n    <li>Synchronization and timing-module requirements<\/li>\r\n    <li>Custom APIs and production test sequences<\/li>\r\n    <li>Calibration and correlation requirements<\/li>\r\n    <li>Production guard bands and system requalification<\/li>\r\n  <\/ul>\r\n\r\n  <p>For validated production equipment, sourcing the original model may involve less engineering risk than changing the digital subsystem without a complete correlation study.<\/p>\r\n\r\n  <h3>PXI Semiconductor Test Procurement and RFQ Guide<\/h3>\r\n\r\n  <div class=\"solution-box\">\r\n    <p>Provide the following information for product selection and quotation:<\/p>\r\n\r\n    <ul>\r\n      <li>Required module model and complete part number<\/li>\r\n      <li>Required quantity and product condition<\/li>\r\n      <li>DUT type and number of digital pins<\/li>\r\n      <li>Required logic voltage range<\/li>\r\n      <li>Required vector rate and timing accuracy<\/li>\r\n      <li>Pattern-memory or scan-test requirements<\/li>\r\n      <li>Number of parallel test sites<\/li>\r\n      <li>Existing PXIe chassis and controller models<\/li>\r\n      <li>Timing and synchronization hardware<\/li>\r\n      <li>Required cables, connector blocks or interface-board information<\/li>\r\n      <li>NI-Digital Pattern Driver and software version<\/li>\r\n      <li>Calibration requirements<\/li>\r\n      <li>Required delivery date and destination<\/li>\r\n    <\/ul>\r\n  <\/div>\r\n\r\n  <p>For pre-owned instruments, request chassis recognition, self-test results, digital channel functional testing, connector inspection and calibration information. Detection in NI MAX alone does not verify digital-level accuracy, timing performance or PPMU operation.<\/p>\r\n\r\n  <h3>\u0427\u0430\u0441\u0442\u043e \u0437\u0430\u0434\u0430\u0432\u0430\u0435\u043c\u044b\u0435 \u0432\u043e\u043f\u0440\u043e\u0441\u044b<\/h3>\r\n\r\n  <h4>What is the main difference between PXIe-6570 and PXIe-6571?<\/h4>\r\n\r\n  <p>The PXIe-6570 provides 32 channels in a two-slot module and supports digital subsystems of up to 256 channels. The PXIe-6571 provides 8- or 32-channel versions in a one-slot module and supports up to 512 channels when using 32-channel modules.<\/p>\r\n\r\n  <h4>Can PXIe-6570 and PXIe-6571 be synchronized as one digital subsystem?<\/h4>\r\n\r\n  <p>No. They should not be grouped as one synchronized digital subsystem. Multiple PXIe-6571 instruments used in a synchronized group must also have matching channel-count configurations.<\/p>\r\n\r\n  <h4>Can a digital pattern instrument replace an SMU?<\/h4>\r\n\r\n  <p>Not completely. The integrated PPMU supports useful per-pin voltage and current measurements, but a dedicated SMU is required when the test needs greater sensitivity, higher power, wider operating ranges, four-quadrant operation or specialized pulse capability.<\/p>\r\n\r\n  <h4>What chassis is required for PXIe-6571?<\/h4>\r\n\r\n  <p>The PXIe-6571 8-channel version requires at least 58 W of cooling capacity in its slot, while the 32-channel version requires an 82 W slot. Confirm the exact chassis specification before ordering.<\/p>\r\n\r\n  <h4>What is a vector in semiconductor digital testing?<\/h4>\r\n\r\n  <p>A vector defines the drive, compare or high-impedance state applied to each digital pin during one pattern period. A test pattern consists of sequences of vectors combined with timing sets, levels and execution-control instructions.<\/p>\r\n\r\n  <h4>What is multisite semiconductor testing?<\/h4>\r\n\r\n  <p>Multisite testing runs the same test flow on several DUTs in parallel. It can reduce average test time per device but requires sufficient digital channels, DC resources, switching, interface-board connections and per-site result handling.<\/p>\r\n\r\n  <h4>What additional hardware is needed with a Digital Pattern Instrument?<\/h4>\r\n\r\n  <p>A complete system normally requires a compatible PXIe chassis, controller, software, cable and DUT interface board. Depending on the device, it may also require SMUs, programmable power supplies, RF instruments, digitizers, switches and timing hardware.<\/p>\r\n\r\n  <h3>Recommended PXI Semiconductor Test Instruments<\/h3>\r\n\r\n  <div class=\"related-info\">\r\n    <p>Choose the <a class=\"product-link\" href=\"https:\/\/pxisource.com\/ru\/product\/pxie-6570\/\">PXIe-6570<\/a> when maintaining an established 32-channel test platform or matching an existing validated configuration. Select the <a class=\"product-link\" href=\"https:\/\/pxisource.com\/ru\/product\/%d0%bf%d0%ba%d1%81%d0%b8%d0%b5-6571\/\">PXIe-6571<\/a> when a new system requires one-slot channel density, 8- or 32-channel options or a larger synchronized digital subsystem.<\/p>\r\n  <\/div>\r\n\r\n  <h3>Related NI PXI Solutions<\/h3>\r\n\r\n  <p>Build a complete semiconductor test platform with a compatible <a class=\"product-link\" href=\"https:\/\/pxisource.com\/ru\/product-category\/%d0%bd%d0%b8\/pxi-%d1%81%d0%b8%d1%81%d1%82%d0%b5%d0%bc%d1%81\/pxi-chassis\/\">\u0428\u0430\u0441\u0441\u0438 PXI<\/a>, <a class=\"product-link\" href=\"https:\/\/pxisource.com\/ru\/product-category\/%d0%bd%d0%b8\/pxi-%d1%81%d0%b8%d1%81%d1%82%d0%b5%d0%bc%d1%81\/pxi-controller\/\">PXI controller<\/a>, precision power instruments, switching, RF hardware and other <a class=\"product-link\" href=\"https:\/\/pxisource.com\/ru\/product-category\/%d0%bd%d0%b8\/pxi-%d1%81%d0%b8%d1%81%d1%82%d0%b5%d0%bc%d1%81\/%d0%bc%d0%be%d0%b4%d1%83%d0%bb%d0%b8-pxi\/\">PXI \u043c\u043e\u0434\u0443\u043b\u0438<\/a> selected for the DUT and test-flow requirements.<\/p>\r\n\r\n  <h3>NI PXI Semiconductor Test Instruments from PXISOURCE<\/h3>\r\n\r\n  <p>PXISOURCE supports semiconductor laboratories, system integrators and production-test teams with digital pattern instrument sourcing, PXIe chassis compatibility review, module selection, accessory matching and legacy-system replacement. Send the DUT pin count, voltage levels, vector rate, test-site quantity, chassis model and required product condition for a technically matched quotation.<\/p>\r\n\r\n  <div class=\"contact-email-box\">\r\n    <p>Need help selecting an NI PXI semiconductor test instrument? Email <a href=\"mailto:sales@pxisource.com\">sales@pxisource.com<\/a> or contact PXISOURCE through <a href=\"https:\/\/wa.me\/8617621710987\">WhatsApp<\/a>.<\/p>\r\n  <\/div>\r\n<\/div>","link":"https:\/\/pxisource.com\/ru\/product-category\/ni\/pxi-systems\/pxi-modules\/pxi-semiconductor-test\/","name":"PXI Semiconductor Test","slug":"pxi-semiconductor-test","taxonomy":"product_cat","parent":667,"meta":[],"menu_order":6,"acf":[],"yoast_head":"<!-- This site is optimized with the Yoast SEO Premium plugin v25.0 (Yoast SEO v28.4) - https:\/\/yoast.com\/product\/yoast-seo-premium-wordpress\/ -->\n<title>NI PXI Semiconductor Test Instruments - PXI Source<\/title>\n<meta name=\"description\" content=\"NI PXI semiconductor test instruments for digital pattern, multisite IC validation and production test, including PXIe-6570 and PXIe-6571.\" \/>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/pxisource.com\/ru\/product-category\/\u043d\u0438\/pxi-\u0441\u0438\u0441\u0442\u0435\u043c\u0441\/\u043c\u043e\u0434\u0443\u043b\u0438-pxi\/pxi-semiconductor-test\/\" \/>\n<meta property=\"og:locale\" content=\"ru_RU\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"PXI Semiconductor Test Archives\" \/>\n<meta property=\"og:description\" content=\"NI PXI semiconductor test instruments for digital pattern, multisite IC validation and production test, including PXIe-6570 and PXIe-6571.\" \/>\n<meta property=\"og:url\" content=\"https:\/\/pxisource.com\/ru\/product-category\/\u043d\u0438\/pxi-\u0441\u0438\u0441\u0442\u0435\u043c\u0441\/\u043c\u043e\u0434\u0443\u043b\u0438-pxi\/pxi-semiconductor-test\/\" \/>\n<meta property=\"og:site_name\" content=\"PXI Source\" \/>\n<meta name=\"twitter:card\" content=\"summary_large_image\" \/>\n<script type=\"application\/ld+json\" class=\"yoast-schema-graph\">{\"@context\":\"https:\\\/\\\/schema.org\",\"@graph\":[{\"@type\":\"CollectionPage\",\"@id\":\"https:\\\/\\\/pxisource.com\\\/product-category\\\/ni\\\/pxi-systems\\\/pxi-modules\\\/pxi-semiconductor-test\\\/\",\"url\":\"https:\\\/\\\/pxisource.com\\\/product-category\\\/ni\\\/pxi-systems\\\/pxi-modules\\\/pxi-semiconductor-test\\\/\",\"name\":\"NI PXI Semiconductor Test Instruments - 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