\n\u0417\u0435\u043c\u043b\u044f NI PCI-7813<\/strong> \u044f\u0432\u043b\u044f\u0435\u0442\u0441\u044f Digital Reconfigurable I\/O (RIO) Device<\/strong> designed for applications that require FPGA-based digital processing, precise hardware timing, custom digital protocols, high-speed waveform generation, hardware-in-the-loop (HIL) testing, and deterministic control.\n<\/p>\n \nThe PCI-7813 combines a Virtex-II 3M Gate FPGA<\/strong> \u0441 160 bidirectional digital I\/O channels<\/strong>. Unlike conventional digital I\/O boards with fixed hardware functionality, the PCI-7813 allows engineers to implement custom I\/O behavior directly in FPGA hardware using LabVIEW FPGA.\n<\/p>\n \nIndividual digital lines can be configured for digital input, digital output, counter\/timer functions, PWM generation, encoder acquisition, triggering, or specialized communication protocols. This makes the PCI-7813 particularly useful for custom automated test, HIL simulation, sensor simulation, digital protocol implementation, and legacy R Series systems.\n<\/p>\n \n\u0417\u0435\u043c\u043b\u044f National Instruments PCI-7813<\/strong> belongs to the NI R Series family of FPGA-based reconfigurable I\/O devices.\n<\/p>\n \nA typical system architecture is:\n<\/p>\n \nDigital Sensors \/ DUT \/ External Equipment \u2192 PCI-7813 Digital I\/O \u2192 FPGA Processing \u2192 PCI Bus \u2192 Host Application<\/strong>\n<\/p>\n \nFor generation and control applications:\n<\/p>\n \nHost Application \u2192 PCI-7813 FPGA \u2192 Custom Hardware Logic \u2192 Digital Outputs \u2192 DUT \/ External Equipment<\/strong>\n<\/p>\n \nBecause digital processing can execute directly on the onboard FPGA, the PCI-7813 can perform deterministic operations without relying on software timing for every I\/O event.\n<\/p>\n \nThe PCI-7813 incorporates a Xilinx Virtex-II 3M Gate FPGA<\/strong> that can be programmed to implement custom digital processing and control logic.\n<\/p>\n \nThe FPGA can be used to implement:\n<\/p>\n \nThe PCI-7813 provides 160 bidirectional digital I\/O channels<\/strong>.\n<\/p>\n \nThe large number of digital lines makes the device particularly useful for applications requiring high-density digital interfacing between a computer and external electronic or industrial equipment.\n<\/p>\n \nIndividual digital lines can be configured according to the FPGA application rather than being permanently assigned to one fixed function.\n<\/p>\n \nWith LabVIEW FPGA, digital lines can be configured individually as inputs or outputs and can participate in custom FPGA-based functions.\n<\/p>\n \nPossible implementations include:\n<\/p>\n \nThe PCI-7813 has a specified maximum clock rate of 40 MHz<\/strong> for its standard device timing architecture.\n<\/p>\n \nFPGA-based timing enables deterministic execution of digital operations and allows custom logic to respond to external events without depending on nondeterministic operating-system timing.\n<\/p>\n \nThe PCI-7813 supports 3.3 V and 5 V digital logic levels<\/strong>, making it suitable for interfacing with a wide range of compatible digital electronic systems.\n<\/p>\n \nElectrical compatibility, current requirements, and signal characteristics should always be verified before connecting external hardware.\n<\/p>\n \nOne of the primary advantages of the PCI-7813 is that timing-critical functions can execute directly in FPGA hardware.\n<\/p>\n \nThis can provide deterministic behavior for:\n<\/p>\n \nThe FPGA can process digital signals locally before transferring information to the host computer.\n<\/p>\n \nThis architecture can reduce host CPU involvement and allows the PCI-7813 to perform custom real-time decisions directly in hardware.\n<\/p>\n \nThe PCI-7813 installs in a compatible conventional PCI slot<\/strong>.\n<\/p>\n \nThe PCI architecture makes this device particularly relevant for maintaining existing automated test, simulation, research, and industrial systems originally designed around NI R Series PCI hardware.\n<\/p>\n \nThe PCI-7813 uses the Virtex-II V3000 FPGA<\/strong>, providing significantly more FPGA resources than the smaller Virtex-II device used in the PCI-7811.\n<\/p>\n \nThe PCI-7813 combines configurable digital I\/O with an onboard FPGA.\n<\/p>\n \nInstead of sending every digital signal directly to host software for processing, the FPGA can evaluate inputs and generate outputs according to custom hardware logic.\n<\/p>\n \nA simplified architecture is:\n<\/p>\n \nExternal Digital Signal \u2192 PCI-7813 I\/O \u2192 FPGA Logic \u2192 Hardware Decision \u2192 Digital Output \/ Host Data<\/strong>\n<\/p>\n \nThis architecture provides deterministic timing that is difficult to achieve with software-only control running under a general-purpose operating system.\n<\/p>\n \nReconfigurable I\/O allows engineers to define the behavior of hardware resources through an FPGA rather than relying only on fixed-function circuitry.\n<\/p>\n \nFor example, the same PCI-7813 digital lines can be incorporated into FPGA logic implementing:\n<\/p>\n \nThis flexibility is one of the major differences between an R Series device and a conventional digital I\/O board.\n<\/p>\n \nThe PCI-7813 can be programmed using LabVIEW FPGA<\/strong>.\n<\/p>\n \nInstead of executing the FPGA diagram as conventional host software, LabVIEW FPGA compiles the application into FPGA hardware logic.\n<\/p>\n \nA typical development process is:\n<\/p>\n \nCreate FPGA VI \u2192 Define I\/O \u2192 Develop FPGA Logic \u2192 Compile FPGA Bitfile \u2192 Download to PCI-7813 \u2192 Run Hardware Application<\/strong>\n<\/p>\n \nGeneral-purpose operating systems can introduce scheduling delays and timing jitter.\n<\/p>\n \nFPGA logic does not depend on normal operating-system task scheduling for each operation. Therefore, timing-sensitive functions can execute with deterministic hardware behavior.\n<\/p>\n \nThis is particularly important for:\n<\/p>\n \nThe PCI-7813 is well suited for hardware-in-the-loop (HIL) test<\/strong> applications that require custom digital interfaces and deterministic signal behavior.\n<\/p>\n \nA typical HIL architecture can be:\n<\/p>\n \nSimulation Software \u2192 PCI-7813 FPGA \u2192 Simulated Digital Signals \u2192 ECU \/ Controller Under Test<\/strong>\n<\/p>\n \nThe FPGA can also capture responses from the device under test and process them according to custom timing requirements.\n<\/p>\n \nThe PCI-7813 can generate programmable digital patterns that emulate compatible digital sensors.\n<\/p>\n \nPossible applications include simulation of:\n<\/p>\n \nThis capability is useful when validating electronic controllers without requiring the physical sensor or complete mechanical system.\n<\/p>\n \nDigital lines and FPGA logic can be configured to acquire and process compatible encoder signals.\n<\/p>\n \nFPGA-based encoder processing can be used for:\n<\/p>\n \nThe PCI-7813 can implement custom pulse-width modulation (PWM)<\/strong> functionality in FPGA logic.\n<\/p>\n \nUnlike a device limited to a fixed number of hardware PWM resources, FPGA-based implementation provides flexibility in defining timing and channel behavior within the available FPGA and I\/O resources.\n<\/p>\n \nThe FPGA can implement custom counter and timer functionality using the digital I\/O lines.\n<\/p>\n \nApplications can include:\n<\/p>\n \nThe PCI-7813 can implement specialized digital communication protocols directly in FPGA hardware.\n<\/p>\n \nThis is valuable when testing equipment that uses proprietary or nonstandard interfaces not supported by conventional instrument hardware.\n<\/p>\n \nPossible FPGA functions include:\n<\/p>\n \nNI identifies bit error rate testing<\/strong> as one of the applications for the PCI-7813.\n<\/p>\n \nCustom FPGA logic can generate digital patterns, capture received data, and compare transmitted and received bit sequences according to the requirements of the test system.\n<\/p>\n \nThe FPGA and high-density digital I\/O architecture can be used for custom digital waveform generation.\n<\/p>\n \nApplications can include:\n<\/p>\n \nThe PCI-7813 can serve as a custom digital interface inside automated test equipment.\n<\/p>\n \nA test sequence can use the FPGA to:\n<\/p>\n \nThe 160 bidirectional digital lines provide significantly more I\/O capacity than many conventional digital DAQ devices.\n<\/p>\n \nThis makes the PCI-7813 particularly useful when an application requires simultaneous connection to large numbers of digital signals.\n<\/p>\n \nApplications can include:\n<\/p>\n \nThe NI R Series architecture supports DMA data transfer<\/strong> between the reconfigurable I\/O hardware and host computer.\n<\/p>\n \nDMA can reduce CPU involvement when transferring data between the FPGA application and host memory, which is useful for continuous and high-throughput test applications.\n<\/p>\n \nThe PCI-7813 and PCI-7811 belong to the same generation of NI R Series digital reconfigurable I\/O devices. The primary difference is the size of the FPGA.\n<\/p>\n \nThe PCI-7813 is generally the better choice when the FPGA application requires more logic resources for custom protocols, state machines, parallel processing, or complex digital control.\n<\/p>\n \nThe PCI-7813 and PXI-7813 provide closely related FPGA and digital I\/O capabilities but use different system platforms.\n<\/p>\n \nThe PCIe-7821 represents a newer generation of digital reconfigurable I\/O hardware and should be considered when designing a new system rather than maintaining an existing PCI-7813 installation.\n<\/p>\n \nImportant selection factors include:\n<\/p>\n \nA newer R Series device should not automatically be considered a drop-in replacement because FPGA resources, connectors, I\/O count, software, and electrical characteristics can differ.\n<\/p>\n \nThe PCI-7813 is primarily a digital reconfigurable I\/O device<\/strong>. It does not provide the onboard analog input and analog output resources available on some multifunction R Series devices.\n<\/p>\n \nChoose the PCI-7813 when the application primarily requires high-density programmable digital I\/O and FPGA processing.\n<\/p>\n \nFor applications requiring both FPGA processing and analog acquisition or generation, an appropriate multifunction RIO device may be more suitable.\n<\/p>\n \nThe PCI-7813 can be used with compatible NI R Series digital I\/O connectivity accessories.\n<\/p>\n \nNI identifies compatible options including:\n<\/p>\n \nThe correct pinout should always be verified for the specific NI 78xx R Series device because terminal assignments can differ between models.\n<\/p>\n \nThe PCI-7813 can also be used with compatible NI 9151 R Series Expansion Chassis<\/strong> hardware.\n<\/p>\n \nNI documentation indicates that the PCI-7813 R Series architecture can support multiple NI 9151 expansion chassis, allowing C Series modules to be incorporated for additional signal conditioning and field I\/O requirements.\n<\/p>\n \nCompatibility should be verified for the specific connector, C Series module, driver, and LabVIEW FPGA software configuration.\n<\/p>\n \nThe PCI-7813 is particularly important for maintaining legacy automated test, HIL, simulation, and control systems that were originally developed around its FPGA architecture.\n<\/p>\n \nReplacing an FPGA-based device can be more complex than replacing a conventional DAQ card because the system may depend on custom FPGA code.\n<\/p>\n \nBefore replacing a PCI-7813, verify:\n<\/p>\n \nBefore selecting the PCI-7813, evaluate:\n<\/p>\n \nThe PCI-7813 can implement deterministic digital interfaces for HIL systems that simulate sensors, actuators, communication signals, and other hardware behavior.\n<\/p>\n \nFPGA-controlled digital outputs can generate programmable signals that simulate compatible encoders, pulse-output sensors, and digital devices.\n<\/p>\n \nThe Virtex-II FPGA can implement specialized digital communication and protocol logic that is not available from conventional fixed-function I\/O hardware.\n<\/p>\n \nThe PCI-7813 can generate deterministic digital patterns and custom waveforms for electronic testing and device stimulation.\n<\/p>\n \nDigital lines and FPGA logic can be configured to acquire encoder signals and implement custom position, direction, and speed processing.\n<\/p>\n \nThe PCI-7813 can provide custom FPGA-based digital interfacing, stimulus generation, triggering, and DUT response processing in automated test equipment.\n<\/p>\n \nThe NI PCI-7813 is a PCI-based digital reconfigurable I\/O device featuring a user-programmable Virtex-II FPGA and 160 bidirectional digital I\/O channels.\n<\/p>\n \nThe NI PCI-7813 ordering part number is 779370-01<\/strong>.\n<\/p>\n \nThe PCI-7813 uses a Xilinx Virtex-II 3M Gate FPGA<\/strong>.\n<\/p>\n \nThe PCI-7813 provides 160 bidirectional digital I\/O channels<\/strong>.\n<\/p>\n \nNo. The digital lines are reconfigurable and can be programmed for input, output, and custom FPGA-based functions according to the application.\n<\/p>\n \nNI specifies a 40 MHz maximum clock rate<\/strong> for the PCI-7813.\n<\/p>\n \nThe PCI-7813 supports 3.3 V and 5 V digital logic levels<\/strong>.\n<\/p>\n \nNo. The PCI-7813 is a digital reconfigurable I\/O device. It does not provide the onboard analog input channels found on multifunction R Series devices such as selected NI 783x, 784x, and 785x models.\n<\/p>\n \nNo. Its primary I\/O resources are FPGA-controlled digital channels.\n<\/p>\n \nYes. LabVIEW FPGA can be used to implement custom hardware logic for the PCI-7813.\n<\/p>\n \nYes. Digital lines and FPGA logic can be configured to implement custom counter\/timer functionality.\n<\/p>\n \nYes. PWM functionality can be implemented using the onboard FPGA and compatible digital output lines.\n<\/p>\n \nYes. The FPGA and digital I\/O lines can be configured for compatible encoder input and processing applications.\n<\/p>\n \nYes. Custom communication protocols are one of the major applications of FPGA-based R Series hardware. Engineers can implement protocol timing, encoding, decoding, handshaking, and related logic directly in the FPGA.\n<\/p>\n \nYes. NI specifically identifies hardware-in-the-loop testing as an application for the PCI-7813 because its FPGA can implement deterministic digital signal generation, acquisition, and processing.\n<\/p>\n \nBoth provide 160 digital I\/O lines and use Virtex-II FPGA technology. The PCI-7813 uses a larger 3M Gate FPGA<\/strong>, while the PCI-7811 uses a 1M Gate FPGA. PCI-7813 therefore provides substantially more FPGA resources for complex applications.\n<\/p>\n \nThe primary difference is the platform. PCI-7813 installs in a conventional PCI computer, while PXI-7813 installs in a PXI chassis. Both use a Virtex-II 3M FPGA and provide 160 digital I\/O lines.\n<\/p>\n \nNI identifies the SHC68-68-RDIO<\/strong> as a compatible digital I\/O cable for the PCI-7813. Compatible connector blocks include the SCB-68 and SCB-68A.\n<\/p>\n \nNewer PCI Express R Series hardware can be considered when redesigning a system, but replacement is not necessarily drop-in. Verify FPGA resources, digital I\/O count, electrical specifications, connector pinout, cables, LabVIEW FPGA source code, driver support, and operating system compatibility before migration.\n<\/p>\n \nVerify the exact 779370-01 model, PCI slot compatibility, 160-DIO requirement, FPGA resource requirements, 3.3 V\/5 V signal compatibility, existing FPGA source code or bitfile, LabVIEW FPGA version, driver compatibility, SHC68-68-RDIO cabling, connector blocks, operating system, and host application compatibility.\n<\/p>\n \n\u0417\u0435\u043c\u043b\u044f NI PCI-7813 Digital Reconfigurable I\/O Device<\/strong> combines a Virtex-II 3M Gate FPGA with 160 bidirectional digital I\/O channels and a conventional PCI interface. Its user-programmable FPGA architecture enables deterministic hardware timing, custom digital protocols, encoder processing, PWM, counters, sensor simulation, waveform generation, HIL testing, and custom automated test functionality. It remains particularly relevant for maintaining existing NI R Series systems that depend on PCI-7813 hardware and previously developed LabVIEW FPGA applications.<\/p>","protected":false},"excerpt":{"rendered":" Bus Connector: PCIProduct Overview<\/h3>\n
Key Features<\/h3>\n
Virtex-II 3M Gate FPGA<\/h4>\n
\n
160 Bidirectional Digital I\/O Channels<\/h4>\n
Individually Configurable Digital Lines<\/h4>\n
\n
40 MHz Maximum Clock Rate<\/h4>\n
3.3 V and 5 V Digital Logic<\/h4>\n
FPGA-Based Hardware Timing<\/h4>\n
\n
Custom Onboard Processing<\/h4>\n
PCI Host Interface<\/h4>\n
Technical Specifications<\/h3>\n
\n
\n \u041f\u0430\u0440\u0430\u043c\u0435\u0442\u0440<\/th>\n \u0421\u043f\u0435\u0446\u0438\u0444\u0438\u043a\u0430\u0446\u0438\u044f<\/th>\n<\/tr>\n \n Product Type<\/td>\n Digital Reconfigurable I\/O Device<\/td>\n<\/tr>\n \n \u041c\u043e\u0434\u0435\u043b\u044c<\/td>\n PCI-7813<\/td>\n<\/tr>\n \n Manufacturer<\/td>\n \u041d\u0430\u0446\u0438\u043e\u043d\u0430\u043b\u044c\u043d\u044b\u0435 \u0438\u043d\u0441\u0442\u0440\u0443\u043c\u0435\u043d\u0442\u044b<\/td>\n<\/tr>\n \n Part Number<\/td>\n 779370-01<\/td>\n<\/tr>\n \n Product Family<\/td>\n NI R Series<\/td>\n<\/tr>\n \n \u0428\u0438\u043d\u043d\u044b\u0439 \u0438\u043d\u0442\u0435\u0440\u0444\u0435\u0439\u0441<\/td>\n PCI<\/td>\n<\/tr>\n \n \u0424\u041f\u0413\u0410<\/td>\n Xilinx Virtex-II 3M Gate<\/td>\n<\/tr>\n \n Bidirectional Digital I\/O<\/td>\n 160 Channels<\/td>\n<\/tr>\n \n Digital Logic Levels<\/td>\n 3.3 V \/ 5 V<\/td>\n<\/tr>\n \n Maximum Clock Rate<\/td>\n 40 MHz<\/td>\n<\/tr>\n \n External Clock Inputs<\/td>\n 0<\/td>\n<\/tr>\n \n Analog Input<\/td>\n No<\/td>\n<\/tr>\n \n Analog Output<\/td>\n No<\/td>\n<\/tr>\n \n FPGA Programming<\/td>\n LabVIEW FPGA<\/td>\n<\/tr>\n \n Primary Function<\/td>\n FPGA-Based Digital I\/O and Custom Hardware Processing<\/td>\n<\/tr>\n \n \u0422\u0438\u043f\u0438\u0447\u043d\u044b\u0435 \u043f\u0440\u0438\u043c\u0435\u043d\u0435\u043d\u0438\u044f<\/td>\n HIL Test, Sensor Simulation, Digital Protocols, Waveform Generation and Custom Control<\/td>\n<\/tr>\n<\/table>\n FPGA Resources<\/h3>\n
\n
\n FPGA Resource<\/th>\n PCI-7813<\/th>\n<\/tr>\n \n FPGA Family<\/td>\n Virtex-II<\/td>\n<\/tr>\n \n FPGA Device<\/td>\n V3000<\/td>\n<\/tr>\n \n Nominal Gate Class<\/td>\n 3 Million Gates<\/td>\n<\/tr>\n \n FPGA Slices<\/td>\n 14,336<\/td>\n<\/tr>\n \n Flip-Flops<\/td>\n 28,672<\/td>\n<\/tr>\n \n 4-Input LUTs<\/td>\n 28,672<\/td>\n<\/tr>\n \n 18 \u00d7 18 Multipliers<\/td>\n 96<\/td>\n<\/tr>\n \n Embedded Block RAM<\/td>\n 1,728 Kb<\/td>\n<\/tr>\n<\/table>\n How Does the PCI-7813 Work?<\/h3>\n
What Is Reconfigurable I\/O?<\/h3>\n
\n
LabVIEW FPGA Programming<\/h3>\n
Deterministic Hardware Processing<\/h3>\n
\n
Hardware-in-the-Loop Testing<\/h3>\n
Sensor Simulation<\/h3>\n
\n
Encoder Interface Applications<\/h3>\n
\n
PWM Generation<\/h3>\n
Custom Counter and Timer Functions<\/h3>\n
\n
Custom Communication Protocols<\/h3>\n
\n
Bit Error Rate Testing<\/h3>\n
High-Speed Waveform Generation<\/h3>\n
\n
\u0410\u0432\u0442\u043e\u043c\u0430\u0442\u0438\u0437\u0438\u0440\u043e\u0432\u0430\u043d\u043d\u044b\u0435 \u0438\u0441\u043f\u044b\u0442\u0430\u0442\u0435\u043b\u044c\u043d\u044b\u0435 \u0441\u0438\u0441\u0442\u0435\u043c\u044b<\/h3>\n
\n
160-Channel Digital Interface<\/h3>\n
\n
DMA Data Transfer<\/h3>\n
PCI-7813 vs PCI-7811<\/h3>\n
\n
\n \u0424\u0443\u043d\u043a\u0446\u0438\u044f<\/th>\n PCI-7813<\/th>\n PCI-7811<\/th>\n<\/tr>\n \n Bus<\/td>\n PCI<\/td>\n PCI<\/td>\n<\/tr>\n \n \u0426\u0438\u0444\u0440\u043e\u0432\u043e\u0439 \u0432\u0432\u043e\u0434-\u0432\u044b\u0432\u043e\u0434<\/td>\n 160<\/td>\n 160<\/td>\n<\/tr>\n \n FPGA Family<\/td>\n Virtex-II<\/td>\n Virtex-II<\/td>\n<\/tr>\n \n FPGA Gate Class<\/td>\n 3 Million<\/strong><\/td>\n 1 Million<\/td>\n<\/tr>\n \n FPGA Slices<\/td>\n 14,336<\/strong><\/td>\n 5,120<\/td>\n<\/tr>\n \n Maximum Clock Rate<\/td>\n 40 MHz<\/td>\n 40 MHz<\/td>\n<\/tr>\n \n Best Fit<\/td>\n More Complex FPGA Applications<\/td>\n Less Complex FPGA Applications<\/td>\n<\/tr>\n<\/table>\n PCI-7813 vs PXI-7813<\/h3>\n
\n
\n \u0424\u0443\u043d\u043a\u0446\u0438\u044f<\/th>\n PCI-7813<\/th>\n PXI-7813<\/th>\n<\/tr>\n \n Platform<\/td>\n PCI<\/strong><\/td>\n PXI<\/td>\n<\/tr>\n \n \u0426\u0438\u0444\u0440\u043e\u0432\u043e\u0439 \u0432\u0432\u043e\u0434-\u0432\u044b\u0432\u043e\u0434<\/td>\n 160<\/td>\n 160<\/td>\n<\/tr>\n \n \u0424\u041f\u0413\u0410<\/td>\n Virtex-II 3M<\/td>\n Virtex-II 3M<\/td>\n<\/tr>\n \n Maximum Clock Rate<\/td>\n 40 MHz<\/td>\n 40 MHz<\/td>\n<\/tr>\n \n Digital Logic<\/td>\n 3.3 V \/ 5 V<\/td>\n 3.3 V \/ 5 V<\/td>\n<\/tr>\n \n Host Architecture<\/td>\n PCI Computer<\/td>\n PXI \u0428\u0430\u0441\u0441\u0438<\/td>\n<\/tr>\n \n Best Fit<\/td>\n PC-Based Legacy RIO Systems<\/td>\n PXI-Based Modular Systems<\/td>\n<\/tr>\n<\/table>\n PCI-7813 vs PCIe-7821<\/h3>\n
\n
PCI-7813 vs Standard Digital I\/O Device<\/h3>\n
\n
\n \u0424\u0443\u043d\u043a\u0446\u0438\u044f<\/th>\n PCI-7813<\/th>\n Standard Digital I\/O<\/th>\n<\/tr>\n \n \u0426\u0438\u0444\u0440\u043e\u0432\u043e\u0439 \u0432\u0432\u043e\u0434-\u0432\u044b\u0432\u043e\u0434<\/td>\n 160 Bidirectional Lines<\/strong><\/td>\n Model Dependent<\/td>\n<\/tr>\n \n User-Programmable FPGA<\/td>\n \u0414\u0430<\/strong><\/td>\n Typically No<\/td>\n<\/tr>\n \n Custom Hardware Timing<\/td>\n \u0414\u0430<\/strong><\/td>\n \u041e\u0433\u0440\u0430\u043d\u0438\u0447\u0435\u043d\u043d\u044b\u0439<\/td>\n<\/tr>\n \n Custom Protocols<\/td>\n \u0414\u0430<\/strong><\/td>\n Usually No<\/td>\n<\/tr>\n \n Custom Counter\/Timer<\/td>\n FPGA Implemented<\/strong><\/td>\n Fixed Resources<\/td>\n<\/tr>\n \n Sensor Simulation<\/td>\n Strong Capability<\/strong><\/td>\n \u041e\u0433\u0440\u0430\u043d\u0438\u0447\u0435\u043d\u043d\u044b\u0439<\/td>\n<\/tr>\n \n HIL Applications<\/td>\n Well Suited<\/strong><\/td>\n \u041e\u0433\u0440\u0430\u043d\u0438\u0447\u0435\u043d\u043d\u044b\u0439<\/td>\n<\/tr>\n<\/table>\n PCI-7813 vs Multifunction RIO<\/h3>\n
Cables and Connectivity<\/h3>\n
\n
NI 9151 Expansion Chassis<\/h3>\n
Legacy System Replacement<\/h3>\n
\n
How to Choose a Reconfigurable I\/O Device<\/h3>\n
\n
Industries<\/h3>\n
\n
Applications<\/h3>\n
Hardware-in-the-Loop Testing<\/h4>\n
Sensor Simulation<\/h4>\n
Custom Digital Protocols<\/h4>\n
High-Speed Waveform Generation<\/h4>\n
Encoder Processing<\/h4>\n
Automated Test<\/h4>\n
Recommended Related Products<\/h3>\n
\n
\n PCI-7813<\/strong><\/td>\n 160-channel PCI digital RIO device with a Virtex-II 3M Gate FPGA.<\/td>\n<\/tr>\n \n PXI-7813<\/strong><\/td>\n PXI form-factor version with 160 digital I\/O lines and Virtex-II 3M FPGA.<\/td>\n<\/tr>\n \n PCI-7811<\/strong><\/td>\n Related 160-DIO R Series device with a smaller Virtex-II 1M Gate FPGA.<\/td>\n<\/tr>\n \n PCIe-7821<\/strong><\/td>\n Newer-generation PCI Express digital reconfigurable I\/O device for FPGA-based applications.<\/td>\n<\/tr>\n \n PCIe-7822<\/strong><\/td>\n Higher-FPGA-resource PCI Express R Series option for complex digital applications.<\/td>\n<\/tr>\n \n SCB-68A<\/strong><\/td>\n Connector block for wiring compatible PCI-7813 digital signals.<\/td>\n<\/tr>\n<\/table>\n Why Choose PCI-7813?<\/h3>\n
\n
Frequently Asked Questions<\/h3>\n
What is the NI PCI-7813?<\/h4>\n
What is the part number of PCI-7813?<\/h4>\n
What FPGA does PCI-7813 use?<\/h4>\n
How many digital I\/O channels does PCI-7813 have?<\/h4>\n
Are the PCI-7813 digital channels fixed as inputs or outputs?<\/h4>\n
What is the maximum clock rate of PCI-7813?<\/h4>\n
What digital logic levels does PCI-7813 support?<\/h4>\n
Does PCI-7813 have analog inputs?<\/h4>\n
Does PCI-7813 have analog outputs?<\/h4>\n
Can PCI-7813 be programmed with LabVIEW FPGA?<\/h4>\n
Can PCI-7813 implement counters and timers?<\/h4>\n
Can PCI-7813 generate PWM signals?<\/h4>\n
Can PCI-7813 read encoder signals?<\/h4>\n
Can PCI-7813 implement custom communication protocols?<\/h4>\n
Is PCI-7813 suitable for HIL testing?<\/h4>\n
What is the difference between PCI-7813 and PCI-7811?<\/h4>\n
What is the difference between PCI-7813 and PXI-7813?<\/h4>\n
What cable is used with PCI-7813?<\/h4>\n
Can PCI-7813 be replaced by a newer R Series device?<\/h4>\n
What should I check before purchasing PCI-7813?<\/h4>\n
\u0417\u0430\u043a\u043b\u044e\u0447\u0435\u043d\u0438\u0435<\/h3>\n
\nFPGA: Virtex-II 3M
\nNumber of Bidirectional Digital Channels: 160
\nNumber of External Clock Inputs: 0
\nMaximum Clock Rate: 40 MHz
\n\u0426\u0438\u0444\u0440\u043e\u0432\u044b\u0435 \u0443\u0440\u043e\u0432\u043d\u0438 \u0432\u0432\u043e\u0434\u0430-\u0432\u044b\u0432\u043e\u0434\u0430: 3,3 \u0412, 5 \u0412
\nDynamic RAM (DRAM): 0 MB<\/p>","protected":false},"featured_media":31127,"template":"","meta":{"_acf_changed":false},"product_brand":[18],"product_cat":[674],"product_tag":[],"class_list":["post-34532","product","type-product","status-publish","has-post-thumbnail","product_brand-national-instruments","product_cat-pci-usb","first","instock","shipping-taxable","purchasable","product-type-simple"],"acf":[],"yoast_head":"\n