{"id":32775,"date":"2026-05-13T14:08:48","date_gmt":"2026-05-13T06:08:48","guid":{"rendered":"https:\/\/pxisource.com\/?post_type=product&#038;p=32775"},"modified":"2026-08-29T13:43:30","modified_gmt":"2026-08-29T05:43:30","slug":"pxie-7862","status":"publish","type":"product","link":"https:\/\/pxisource.com\/ru\/product\/pxie-7862\/","title":{"rendered":"PXIe-7862"},"content":{"rendered":"<h3>PXIe-7862 Kintex-7 325T FPGA Multifunction RIO Module<\/h3>\n<p>\u0417\u0435\u043c\u043b\u044f <strong>PXIe-7862<\/strong> is a high-performance PXI Express multifunction reconfigurable I\/O module built around a user-programmable <strong>Kintex-7 325T FPGA<\/strong>. It integrates analog acquisition, analog generation, digital I\/O and onboard memory for demanding test, measurement and control systems.<\/p>\n<p>With <strong>16 analog inputs<\/strong>, <strong>8 analog outputs<\/strong>, <strong>32 bidirectional digital I\/O lines<\/strong> \u0438 <strong>512 MB of onboard DRAM<\/strong>, the PXIe-7862 is suitable for hardware-in-the-loop testing, multichannel sensor simulation, custom protocol communication and high-speed closed-loop control.<\/p>\n<h3>Key Features of the PXIe-7862<\/h3>\n<ul>\n<li>Kintex-7 325T user-programmable FPGA<\/li>\n<li>512 MB onboard DRAM<\/li>\n<li>16 simultaneously sampled analog input channels<\/li>\n<li>16-bit analog input resolution<\/li>\n<li>1 MS\/s maximum sampling rate per analog input<\/li>\n<li>8 analog output channels with 16-bit resolution<\/li>\n<li>1 MS\/s maximum analog output update rate<\/li>\n<li>32 bidirectional digital I\/O lines<\/li>\n<li>10 MHz maximum digital clock rate<\/li>\n<li>3.3 V single-ended digital signaling<\/li>\n<li>Independent timing and triggering for individual channels<\/li>\n<li>Multirate acquisition support<\/li>\n<li>PXI peer-to-peer data streaming<\/li>\n<\/ul>\n<h3>PXIe-7862 Technical Specifications<\/h3>\n<table>\n<tbody>\n<tr>\n<th>Product Model<\/th>\n<td>PXIe-7862<\/td>\n<\/tr>\n<tr>\n<th>Part Number<\/th>\n<td>786672-01<\/td>\n<\/tr>\n<tr>\n<th>Product Type<\/th>\n<td>PXI Express Multifunction Reconfigurable I\/O Module<\/td>\n<\/tr>\n<tr>\n<th>\u0424\u041f\u0413\u0410<\/th>\n<td>\u041aintex-7 325T<\/td>\n<\/tr>\n<tr>\n<th>Onboard Memory<\/th>\n<td>512 \u041c\u0411 \u041e\u0417\u0423<\/td>\n<\/tr>\n<tr>\n<th>Analog Inputs<\/th>\n<td>16<\/td>\n<\/tr>\n<tr>\n<th>Analog Input Resolution<\/th>\n<td>16 bit<\/td>\n<\/tr>\n<tr>\n<th>Maximum Analog Input Rate<\/th>\n<td>1 \u041c\u0432\u044b\u0431\/\u0441 \u043d\u0430 \u043a\u0430\u043d\u0430\u043b<\/td>\n<\/tr>\n<tr>\n<th>Analog Input Ranges<\/th>\n<td>\u00b11 V, \u00b12 V, \u00b15 V and \u00b110 V<\/td>\n<\/tr>\n<tr>\n<th>Maximum Differential Inputs<\/th>\n<td>16<\/td>\n<\/tr>\n<tr>\n<th>Maximum Single-Ended Inputs<\/th>\n<td>16<\/td>\n<\/tr>\n<tr>\n<th>Analog Outputs<\/th>\n<td>8<\/td>\n<\/tr>\n<tr>\n<th>Analog Output Resolution<\/th>\n<td>16 bit<\/td>\n<\/tr>\n<tr>\n<th>Maximum Analog Output Rate<\/th>\n<td>1 \u041c\u0432\u044b\u0431\/\u0441 \u043d\u0430 \u043a\u0430\u043d\u0430\u043b<\/td>\n<\/tr>\n<tr>\n<th>Analog Output Range<\/th>\n<td>\u00b110 V<\/td>\n<\/tr>\n<tr>\n<th>\u0426\u0438\u0444\u0440\u043e\u0432\u043e\u0439 \u0432\u0432\u043e\u0434-\u0432\u044b\u0432\u043e\u0434<\/th>\n<td>32 bidirectional lines<\/td>\n<\/tr>\n<tr>\n<th>Maximum Digital Clock Rate<\/th>\n<td>10 MHz<\/td>\n<\/tr>\n<tr>\n<th>Maximum Digital Update Rate<\/th>\n<td>100 ns<\/td>\n<\/tr>\n<tr>\n<th>Digital Logic Level<\/th>\n<td>3.3 V<\/td>\n<\/tr>\n<tr>\n<th>Digital Signaling<\/th>\n<td>Single-ended<\/td>\n<\/tr>\n<tr>\n<th>Bus Type<\/th>\n<td>PXI Express<\/td>\n<\/tr>\n<tr>\n<th>Peer-to-Peer Streaming<\/th>\n<td>Supported<\/td>\n<\/tr>\n<tr>\n<th>Operating Temperature<\/th>\n<td>0\u00b0C to 55\u00b0C<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<h3>PXIe-7862 Part Number and Accessories<\/h3>\n<table>\n<tbody>\n<tr>\n<th>Item<\/th>\n<th>Part Number<\/th>\n<th>\u041e\u043f\u0438\u0441\u0430\u043d\u0438\u0435<\/th>\n<\/tr>\n<tr>\n<td>PXIe-7862<\/td>\n<td>786672-01<\/td>\n<td>Kintex-7 325T multifunction RIO module with 512 MB DRAM<\/td>\n<\/tr>\n<tr>\n<td>SCB-68 HSDIO<\/td>\n<td>782914-01<\/td>\n<td>Shielded 68-pin connector block for high-speed digital I\/O<\/td>\n<\/tr>\n<tr>\n<td>SCB-68A<\/td>\n<td>782536-01<\/td>\n<td>Shielded screw-terminal I\/O connector block<\/td>\n<\/tr>\n<tr>\n<td>SHC68-C68-RDIO2<\/td>\n<td>156166-02<\/td>\n<td>2 m shielded high-speed digital I\/O cable<\/td>\n<\/tr>\n<tr>\n<td>SHC68M-68F-RMIO<\/td>\n<td>189588-02<\/td>\n<td>2 m shielded cable for multifunction RIO connections<\/td>\n<\/tr>\n<tr>\n<td>SHC68-NT-S<\/td>\n<td>189041-02<\/td>\n<td>2 m shielded cable with unterminated leads<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<p>Required cables and connector blocks depend on the analog and digital connector groups used in the application. Confirm the cable type, pinout and terminal compatibility before ordering.<\/p>\n<h3>Kintex-7 325T FPGA Processing<\/h3>\n<p>The PXIe-7862 uses a large Kintex-7 325T FPGA to execute application-specific acquisition, generation, processing and control logic directly in hardware. Its FPGA provides greater capacity than the Kintex-7 160T used in the PXIe-7861.<\/p>\n<p>This additional capacity supports larger FPGA designs, more parallel signal-processing operations, complex custom protocols and multiple deterministic control loops within one module.<\/p>\n<h3>512 MB Onboard DRAM<\/h3>\n<p>The module includes <strong>512 MB of onboard DRAM<\/strong> for data buffering, waveform storage and FPGA-based block processing. Acquired data can be stored temporarily before transfer to a PXI controller or compatible peer-to-peer module.<\/p>\n<p>Onboard memory is valuable for long waveform records, high-throughput acquisition and applications where continuous host transfers are not practical.<\/p>\n<h3>16 Simultaneously Sampled Analog Inputs<\/h3>\n<p>The PXIe-7862 provides 16 analog input channels with dedicated 16-bit ADCs. All channels can acquire signals simultaneously at rates up to <strong>1 \u041c\u0432\u044b\u0431\/\u0441 \u043d\u0430 \u043a\u0430\u043d\u0430\u043b<\/strong>.<\/p>\n<p>The dedicated ADC architecture eliminates multiplexer delay between channels and enables independent timing, individual channel triggering and multirate sampling.<\/p>\n<h3>Programmable Analog Input Ranges<\/h3>\n<p>The analog inputs support programmable voltage ranges of <strong>\u00b11 V, \u00b12 V, \u00b15 V and \u00b110 V<\/strong>. Selecting the smallest suitable range helps improve measurement resolution for lower-amplitude signals.<\/p>\n<p>The module supports differential and single-ended analog measurements, allowing the connection method to be selected according to grounding, noise and signal-source requirements.<\/p>\n<h3>Eight FPGA-Timed Analog Outputs<\/h3>\n<p>Eight 16-bit analog output channels provide update rates up to <strong>1 \u041c\u0432\u044b\u0431\/\u0441 \u043d\u0430 \u043a\u0430\u043d\u0430\u043b<\/strong> over a \u00b110 V range. The outputs can generate simulated sensor signals, control voltages and synchronized test waveforms.<\/p>\n<p>Direct FPGA control enables deterministic output responses based on analog measurements, digital events, custom calculations or application-specific triggers.<\/p>\n<h3>32 Bidirectional Digital I\/O Lines<\/h3>\n<p>The PXIe-7862 provides 32 bidirectional digital I\/O lines using 3.3 V single-ended signaling. Each line can be independently configured as an input or output in the FPGA application.<\/p>\n<p>The digital channels support update intervals as short as 100 ns, corresponding to a maximum clock rate of <strong>10 MHz<\/strong>. They can be used for control, triggering, monitoring and custom communication interfaces.<\/p>\n<h3>Independent Timing and Triggering<\/h3>\n<p>The PXIe-7862 allows timing and triggering functions to be created directly in FPGA hardware. Analog and digital channels can operate at different rates while maintaining deterministic synchronization.<\/p>\n<p>This flexibility supports custom trigger qualification, event sequencing, pulse generation, multirate acquisition and low-latency closed-loop control.<\/p>\n<h3>PXI Peer-to-Peer Streaming<\/h3>\n<p>PXI peer-to-peer streaming enables the PXIe-7862 to transfer data directly to compatible PXI Express modules without routing every transfer through the host processor.<\/p>\n<p>This capability can reduce latency and host processing requirements when integrating the module with digitizers, signal generators, FPGA modules and other high-performance PXI instruments.<\/p>\n<h3>\u0422\u0438\u043f\u0438\u0447\u043d\u044b\u0435 \u043f\u0440\u0438\u043c\u0435\u043d\u0435\u043d\u0438\u044f<\/h3>\n<ul>\n<li>\u0421\u0438\u043c\u0443\u043b\u044f\u0446\u0438\u044f \u0441 \u0430\u043f\u043f\u0430\u0440\u0430\u0442\u043d\u044b\u043c \u0432\u0445\u043e\u0434\u043e\u043c<\/li>\n<li>Multichannel sensor simulation<\/li>\n<li>Automotive electronic control unit testing<\/li>\n<li>High-speed closed-loop control<\/li>\n<li>Power electronics and inverter validation<\/li>\n<li>Motor control development<\/li>\n<li>Custom digital protocol implementation<\/li>\n<li>\u041e\u0431\u0440\u0430\u0431\u043e\u0442\u043a\u0430 \u0441\u0438\u0433\u043d\u0430\u043b\u043e\u0432 \u043d\u0430 \u043e\u0441\u043d\u043e\u0432\u0435 \u041f\u041b\u0418\u0421<\/li>\n<li>Electronic device validation<\/li>\n<li>Automated production testing<\/li>\n<\/ul>\n<h3>LabVIEW FPGA Programming<\/h3>\n<p>The PXIe-7862 can be customized using the LabVIEW FPGA Module and compatible NI-RIO software. Engineers can create FPGA applications for custom measurement, waveform generation, triggering, protocol communication and control.<\/p>\n<p>After compilation, the FPGA bitfile executes directly on the module, providing deterministic hardware timing without relying on the response time of the host operating system.<\/p>\n<h3>Connectivity and Signal Wiring<\/h3>\n<p>Compatible SHC68 cables and SCB-68 series connector blocks provide access to the analog and digital signals. Separate cable types are available for multifunction analog connections and high-speed digital I\/O.<\/p>\n<p>Use suitable shielding, grounding and cable-routing practices to minimize interference between sensitive analog measurements, digital switching signals and power wiring.<\/p>\n<h3>PXI Express System Integration<\/h3>\n<p>The PXIe-7862 requires a compatible PXI Express chassis and controller. Chassis selection should account for slot compatibility, cooling capacity, backplane bandwidth, synchronization and the power requirements of all installed modules.<\/p>\n<p>Visit the <a href=\"https:\/\/pxisource.com\/ru\/product-category\/%d0%bd%d0%b8\/pxi-%d1%81%d0%b8%d1%81%d1%82%d0%b5%d0%bc%d1%81\/%d0%bc%d0%be%d0%b4%d1%83%d0%bb%d0%b8-pxi\/\">NI PXI Modules category<\/a> to explore related hardware for building a complete automated test system.<\/p>\n<h3>Troubleshooting the PXIe-7862<\/h3>\n<h4>The module is not detected by the system<\/h4>\n<p>Verify that the PXIe-7862 is installed in a compatible PXI Express slot. Check the chassis controller, PXI Platform Services and NI-RIO driver installation.<\/p>\n<h4>The FPGA bitfile cannot be downloaded<\/h4>\n<p>Confirm that the bitfile was compiled specifically for the PXIe-7862. Check that the installed LabVIEW FPGA and NI-RIO versions support the module.<\/p>\n<h4>Analog input measurements contain excessive noise<\/h4>\n<p>Check the signal grounding, input configuration, shielding and cable routing. Use the smallest appropriate voltage range and keep analog cables away from high-speed digital or power wiring.<\/p>\n<h4>Digital signals are not recognized correctly<\/h4>\n<p>Confirm that the connected device uses compatible 3.3 V logic. Check the FPGA line direction, connector pin assignment and shared digital ground.<\/p>\n<h4>Data transfers are slower than expected<\/h4>\n<p>Review DMA FIFO settings, DRAM buffering, host processing load and PXI Express bandwidth. Peer-to-peer streaming may improve performance when supported modules are used.<\/p>\n<h3>PXIe-7862 Comparison<\/h3>\n<table>\n<tbody>\n<tr>\n<th>\u041c\u043e\u0434\u0435\u043b\u044c<\/th>\n<th>\u0424\u041f\u0413\u0410<\/th>\n<th>Analog Inputs<\/th>\n<th>Analog Outputs<\/th>\n<th>\u0426\u0438\u0444\u0440\u043e\u0432\u043e\u0439 \u0432\u0432\u043e\u0434-\u0432\u044b\u0432\u043e\u0434<\/th>\n<th>DRAM<\/th>\n<\/tr>\n<tr>\n<td>PXIe-7862<\/td>\n<td>\u041aintex-7 325T<\/td>\n<td>16<\/td>\n<td>8<\/td>\n<td>32<\/td>\n<td>512 MB<\/td>\n<\/tr>\n<tr>\n<td>PXIe-7861<\/td>\n<td>\u041a\u0438\u043d\u0442\u0435\u043a\u0441-7 160\u0422<\/td>\n<td>16<\/td>\n<td>8<\/td>\n<td>32<\/td>\n<td>512 MB<\/td>\n<\/tr>\n<tr>\n<td>PXIe-7858<\/td>\n<td>\u041aintex-7 325T<\/td>\n<td>8<\/td>\n<td>8<\/td>\n<td>48<\/td>\n<td>512 MB<\/td>\n<\/tr>\n<tr>\n<td>PXIe-7857<\/td>\n<td>\u041a\u0438\u043d\u0442\u0435\u043a\u0441-7 160\u0422<\/td>\n<td>8<\/td>\n<td>8<\/td>\n<td>48<\/td>\n<td>512 MB<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<h3>Recommended Related Products<\/h3>\n<ul>\n<li><a href=\"https:\/\/pxisource.com\/ru\/product\/pxie-7861\/\">PXIe-7861<\/a> \u2013 16-channel multifunction RIO module with a Kintex-7 160T FPGA<\/li>\n<li><a href=\"https:\/\/pxisource.com\/ru\/product\/pxie-7858\/\">PXIe-7858<\/a> \u2013 Kintex-7 325T module with 8 analog inputs and 48 digital I\/O lines<\/li>\n<li><a href=\"https:\/\/pxisource.com\/ru\/product\/pxie-7857\/\">PXIe-7857<\/a> \u2013 Kintex-7 160T module with 8 analog inputs and 48 digital I\/O lines<\/li>\n<li><a href=\"https:\/\/pxisource.com\/ru\/product\/pxie-7866\/\">PXIe-7866<\/a> \u2013 Kintex-7 325T module with 24 analog outputs for sensor simulation<\/li>\n<li><a href=\"https:\/\/pxisource.com\/ru\/product\/pxie-1092\/\">PXIe-1092<\/a> \u2013 PXI Express chassis for modular test and measurement systems<\/li>\n<\/ul>\n<h3>Selecting the PXIe-7862<\/h3>\n<p>Choose the PXIe-7862 when an application requires 16 simultaneous analog inputs, deterministic analog outputs, digital control lines, onboard DRAM and substantial FPGA processing capacity.<\/p>\n<p>If the same I\/O configuration is required but the FPGA design is less complex, the PXIe-7861 may provide a more economical option. If more digital channels are required instead of 16 analog inputs, consider the PXIe-7858.<\/p>\n<h3>PXIe-7862 vs PXIe-7861<\/h3>\n<p>The PXIe-7862 and PXIe-7861 both provide 16 analog inputs, 8 analog outputs, 32 bidirectional digital I\/O lines, 1 MS\/s analog operation and 512 MB of onboard DRAM.<\/p>\n<p>The primary difference is FPGA capacity. The PXIe-7862 uses a <strong>Kintex-7 325T FPGA<\/strong>, while the PXIe-7861 uses a Kintex-7 160T FPGA. The PXIe-7862 is better suited to larger FPGA designs, complex custom protocols and extensive parallel processing.<\/p>\n<h3>Why Choose the PXIe-7862?<\/h3>\n<ul>\n<li>Large Kintex-7 325T FPGA for demanding applications<\/li>\n<li>16 simultaneously sampled analog inputs<\/li>\n<li>1 MS\/s analog input and output operation<\/li>\n<li>Eight deterministic analog outputs<\/li>\n<li>32 configurable digital I\/O lines<\/li>\n<li>512 MB DRAM for waveform buffering<\/li>\n<li>Peer-to-peer streaming for PXI system integration<\/li>\n<\/ul>\n<h3>Frequently Asked Questions<\/h3>\n<h4>What is the PXIe-7862 used for?<\/h4>\n<p>The PXIe-7862 is used for FPGA-based data acquisition, hardware-in-the-loop testing, sensor simulation, custom protocol communication and deterministic control.<\/p>\n<h4>Which FPGA does the PXIe-7862 use?<\/h4>\n<p>It uses a user-programmable Kintex-7 325T FPGA.<\/p>\n<h4>How many analog channels does the PXIe-7862 provide?<\/h4>\n<p>The module provides 16 analog input channels and 8 analog output channels, all with 16-bit resolution.<\/p>\n<h4>What is the maximum analog sampling rate?<\/h4>\n<p>The analog inputs can acquire signals simultaneously at rates up to 1 MS\/s per channel. The analog outputs also support update rates up to 1 MS\/s.<\/p>\n<h4>How much onboard memory does the PXIe-7862 provide?<\/h4>\n<p>The module includes 512 MB of onboard DRAM.<\/p>\n<h4>How many digital I\/O lines are available?<\/h4>\n<p>The PXIe-7862 provides 32 bidirectional, 3.3 V digital I\/O lines with a maximum clock rate of 10 MHz.<\/p>\n<h4>What is the difference between the PXIe-7862 and PXIe-7861?<\/h4>\n<p>The PXIe-7862 uses a larger Kintex-7 325T FPGA, while the PXIe-7861 uses a Kintex-7 160T FPGA. Their principal analog, digital and DRAM configurations are otherwise similar.<\/p>\n<h4>Does the PXIe-7862 support peer-to-peer streaming?<\/h4>\n<p>Yes. It supports direct data streaming to compatible PXI Express modules.<\/p>\n<h4>What is the PXIe-7862 part number?<\/h4>\n<p>The standard NI part number for the PXIe-7862 is <strong>786672-01<\/strong>.<\/p>\n<h3>Request a Quote for the PXIe-7862<\/h3>\n<p>Contact us for current availability, lead time and project pricing for the <strong>PXIe-7862 Multifunction Reconfigurable I\/O Module<\/strong>. We can also help confirm compatible PXI chassis, controllers, cables and terminal accessories for your application.<\/p>","protected":false},"excerpt":{"rendered":"<p>\u041c\u0430\u043a\u0441\u0438\u043c\u0430\u043b\u044c\u043d\u0430\u044f \u0447\u0430\u0441\u0442\u043e\u0442\u0430 \u0434\u0438\u0441\u043a\u0440\u0435\u0442\u0438\u0437\u0430\u0446\u0438\u0438: 1 \u041c\u0432\u044b\u0431\/\u0441<br \/>\n\u0428\u0438\u043d\u043d\u044b\u0439 \u0441\u043e\u0435\u0434\u0438\u043d\u0438\u0442\u0435\u043b\u044c: PXI Express<br \/>\nMaximum Clock Rate: 1 MHz<br \/>\n\u041a\u043e\u043b\u0438\u0447\u0435\u0441\u0442\u0432\u043e \u0434\u0432\u0443\u043d\u0430\u043f\u0440\u0430\u0432\u043b\u0435\u043d\u043d\u044b\u0445 \u0446\u0438\u0444\u0440\u043e\u0432\u044b\u0445 \u043a\u0430\u043d\u0430\u043b\u043e\u0432: 32<br \/>\nDigital I\/O Logic Levels: 3.3 V<br \/>\n\u0414\u0438\u043d\u0430\u043c\u0438\u0447\u0435\u0441\u043a\u0430\u044f \u043e\u043f\u0435\u0440\u0430\u0442\u0438\u0432\u043d\u0430\u044f \u043f\u0430\u043c\u044f\u0442\u044c (DRAM): 512 \u041c\u0411<br \/>\nFPGA: Kintex-7 325T<br \/>\n\u0414\u0438\u0430\u043f\u0430\u0437\u043e\u043d \u0432\u0445\u043e\u0434\u043d\u043e\u0433\u043e \u043d\u0430\u043f\u0440\u044f\u0436\u0435\u043d\u0438\u044f: \u043e\u0442 -1 \u0412 \u0434\u043e 1 \u0412, \u043e\u0442 -1 \u0412 \u0434\u043e 1 \u0412, \u043e\u0442 -2 \u0412 \u0434\u043e 2 \u0412, \u043e\u0442 -5 \u0412 \u0434\u043e 5 \u0412<br \/>\n\u041f\u043e\u0434\u0434\u0435\u0440\u0436\u0438\u0432\u0430\u0435\u0442 \u043f\u043e\u0442\u043e\u043a\u043e\u0432\u0443\u044e \u043f\u0435\u0440\u0435\u0434\u0430\u0447\u0443 Peer-to-Peer: \u0414\u0430<br \/>\nNumber of Analog Input Channels: 16<br \/>\n\u041a\u043e\u043b\u0438\u0447\u0435\u0441\u0442\u0432\u043e \u0430\u043d\u0430\u043b\u043e\u0433\u043e\u0432\u044b\u0445 \u0432\u044b\u0445\u043e\u0434\u043d\u044b\u0445 \u043a\u0430\u043d\u0430\u043b\u043e\u0432: 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