{"id":32383,"date":"2026-04-28T10:27:45","date_gmt":"2026-04-28T02:27:45","guid":{"rendered":"https:\/\/pxisource.com\/?post_type=product&#038;p=32383"},"modified":"2026-08-30T14:04:08","modified_gmt":"2026-08-30T06:04:08","slug":"pxie-7890","status":"publish","type":"product","link":"https:\/\/pxisource.com\/ru\/product\/pxie-7890\/","title":{"rendered":"PXIe-7890"},"content":{"rendered":"<h3>PXIe-7890 KU060 FPGA FlexRIO Multifunction I\/O Module<\/h3>\n<p>\u0417\u0435\u043c\u043b\u044f <strong>PXIe-7890<\/strong> is a PXI Express FlexRIO multifunction I\/O module designed for signal-level inverter hardware-in-the-loop testing. It combines eight differential analog inputs, standard analog outputs, low-latency analog outputs, 64 bidirectional digital I\/O lines and two QSFP high-speed serial interfaces with a user-programmable Xilinx Kintex UltraScale KU060 FPGA.<\/p>\n<p>The module provides the deterministic processing and low-latency I\/O required to run traction-motor and power-electronics models directly in FPGA hardware. Engineers can use the PXIe-7890 to validate inverter controllers, motor-control ECUs and other high-speed embedded control systems under repeatable simulated operating conditions.<\/p>\n<h3>Key Features of the PXIe-7890<\/h3>\n<ul>\n<li>Eight differential analog input channels<\/li>\n<li>16-bit simultaneous analog input sampling<\/li>\n<li>2 MS\/s maximum analog input sample rate<\/li>\n<li>Programmable \u00b11 V, \u00b12 V, \u00b15 V, \u00b110 V and \u00b120 V input ranges<\/li>\n<li>16 standard analog output channels<\/li>\n<li>16 dedicated low-latency analog output channels<\/li>\n<li>16-bit analog output resolution<\/li>\n<li>Up to 4 MS\/s analog output update rate<\/li>\n<li>64 bidirectional digital I\/O channels<\/li>\n<li>Selectable 3.3 V or 5 V digital logic by 16-channel bank<\/li>\n<li>10 MHz maximum digital output toggle rate<\/li>\n<li>Two QSFP high-speed serial interfaces<\/li>\n<li>User-programmable Xilinx Kintex UltraScale KU060 FPGA<\/li>\n<li>331,680 FPGA lookup tables<\/li>\n<li>2,760 DSP48 slices<\/li>\n<li>38 Mb embedded block RAM<\/li>\n<li>4 GB onboard DRAM<\/li>\n<li>Up to 60 DMA channels<\/li>\n<li>PXI Express timing and synchronization support<\/li>\n<li>Designed for inverter and traction-motor HIL testing<\/li>\n<\/ul>\n<h3>PXIe-7890 Technical Specifications<\/h3>\n<table>\n<tbody>\n<tr>\n<th>Product Model<\/th>\n<td>PXIe-7890<\/td>\n<\/tr>\n<tr>\n<th>Part Number<\/th>\n<td>787713-01<\/td>\n<\/tr>\n<tr>\n<th>Product Type<\/th>\n<td>PXI FlexRIO multifunction I\/O module<\/td>\n<\/tr>\n<tr>\n<th>Primary Application<\/th>\n<td>Signal-level inverter hardware-in-the-loop testing<\/td>\n<\/tr>\n<tr>\n<th>\u0424\u041f\u0413\u0410<\/th>\n<td>Xilinx Kintex UltraScale KU060<\/td>\n<\/tr>\n<tr>\n<th>FPGA Lookup Tables<\/th>\n<td>331,680<\/td>\n<\/tr>\n<tr>\n<th>DSP48 Slices<\/th>\n<td>2,760<\/td>\n<\/tr>\n<tr>\n<th>Embedded Block RAM<\/th>\n<td>38 Mb<\/td>\n<\/tr>\n<tr>\n<th>Onboard DRAM<\/th>\n<td>4 GB, two banks of 2 GB<\/td>\n<\/tr>\n<tr>\n<th>DRAM Clock Rate<\/th>\n<td>1,064 MHz<\/td>\n<\/tr>\n<tr>\n<th>Maximum Number of DMA Channels<\/th>\n<td>60<\/td>\n<\/tr>\n<tr>\n<th>Data Transfer Methods<\/th>\n<td>DMA, interrupts, programmed I\/O and multi-gigabit transceivers<\/td>\n<\/tr>\n<tr>\n<th>FPGA Timebase Reference<\/th>\n<td>PXI Express 100 MHz system clock<\/td>\n<\/tr>\n<tr>\n<th>Analog Input Channels<\/th>\n<td>8 differential<\/td>\n<\/tr>\n<tr>\n<th>Analog Input Resolution<\/th>\n<td>16 bits<\/td>\n<\/tr>\n<tr>\n<th>Maximum Analog Input Sample Rate<\/th>\n<td>2 MS\/s<\/td>\n<\/tr>\n<tr>\n<th>Analog Input Sampling<\/th>\n<td>\u0421\u0438\u043d\u0445\u0440\u043e\u043d\u043d\u044b\u0439<\/td>\n<\/tr>\n<tr>\n<th>Analog Input Ranges<\/th>\n<td>\u00b11 V, \u00b12 V, \u00b15 V, \u00b110 V and \u00b120 V<\/td>\n<\/tr>\n<tr>\n<th>Analog Input Filtering<\/th>\n<td>Programmable low-latency filtering<\/td>\n<\/tr>\n<tr>\n<th>Published Analog Input Absolute Accuracy<\/th>\n<td>0.71 mV for the applicable range and conditions<\/td>\n<\/tr>\n<tr>\n<th>Standard Analog Output Channels<\/th>\n<td>16<\/td>\n<\/tr>\n<tr>\n<th>Low-Latency Analog Output Channels<\/th>\n<td>16<\/td>\n<\/tr>\n<tr>\n<th>Total Analog Output Channels<\/th>\n<td>32<\/td>\n<\/tr>\n<tr>\n<th>Analog Output Resolution<\/th>\n<td>16 bits<\/td>\n<\/tr>\n<tr>\n<th>Maximum Analog Output Update Rate<\/th>\n<td>4 MS\/s<\/td>\n<\/tr>\n<tr>\n<th>Standard Analog Output Range<\/th>\n<td>\u00b110 V<\/td>\n<\/tr>\n<tr>\n<th>Low-Latency AO Channels 0 through 7<\/th>\n<td>\u00b110 V and \u00b10.5 V ranges<\/td>\n<\/tr>\n<tr>\n<th>Low-Latency AO Channels 8 through 15<\/th>\n<td>\u00b110 V range<\/td>\n<\/tr>\n<tr>\n<th>Standard AO Uncalibrated Update Latency<\/th>\n<td>440 ns<\/td>\n<\/tr>\n<tr>\n<th>Standard AO Calibrated Update Latency<\/th>\n<td>460 ns<\/td>\n<\/tr>\n<tr>\n<th>Standard AO Analog Latency<\/th>\n<td>75 ns<\/td>\n<\/tr>\n<tr>\n<th>Low-Latency AO Uncalibrated Update Latency<\/th>\n<td>148 ns<\/td>\n<\/tr>\n<tr>\n<th>Low-Latency AO Calibrated Update Latency<\/th>\n<td>168 ns<\/td>\n<\/tr>\n<tr>\n<th>Low-Latency AO Analog Latency<\/th>\n<td>50 ns<\/td>\n<\/tr>\n<tr>\n<th>Bidirectional Digital I\/O Channels<\/th>\n<td>64<\/td>\n<\/tr>\n<tr>\n<th>Digital I\/O Signal Type<\/th>\n<td>Single-ended<\/td>\n<\/tr>\n<tr>\n<th>Digital Logic Levels<\/th>\n<td>3.3 V or 5 V, selectable by 16-channel bank<\/td>\n<\/tr>\n<tr>\n<th>Digital Direction Control<\/th>\n<td>Per channel<\/td>\n<\/tr>\n<tr>\n<th>Maximum Digital Output Current<\/th>\n<td>4 mA sink or source per channel<\/td>\n<\/tr>\n<tr>\n<th>Maximum Digital Output Toggle Rate<\/th>\n<td>10 MHz<\/td>\n<\/tr>\n<tr>\n<th>High-Speed Serial Connectors<\/th>\n<td>2 \u00d7 QSFP<\/td>\n<\/tr>\n<tr>\n<th>Primary I\/O Connectors<\/th>\n<td>Multiple 68-pin VHDCI receptacles<\/td>\n<\/tr>\n<tr>\n<th>\u0428\u0438\u043d\u043d\u044b\u0439 \u0438\u043d\u0442\u0435\u0440\u0444\u0435\u0439\u0441<\/th>\n<td>PXI Express<\/td>\n<\/tr>\n<tr>\n<th>Reconfigurable<\/th>\n<td>\u0414\u0430<\/td>\n<\/tr>\n<tr>\n<th>Operating Temperature<\/th>\n<td>0\u00b0C to 55\u00b0C<\/td>\n<\/tr>\n<tr>\n<th>Calibration Interval<\/th>\n<td>2 years<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<h3>PXIe-7890 Part Number and Calibration Accessory<\/h3>\n<table>\n<tbody>\n<tr>\n<th>Item<\/th>\n<th>Part Number<\/th>\n<th>\u041e\u043f\u0438\u0441\u0430\u043d\u0438\u0435<\/th>\n<\/tr>\n<tr>\n<td>PXIe-7890<\/td>\n<td>787713-01<\/td>\n<td>KU060 FPGA multifunction FlexRIO module with analog I\/O, digital I\/O and QSFP interfaces<\/td>\n<\/tr>\n<tr>\n<td>CAL-7890\/7891 Calibration Fixture<\/td>\n<td>788790-01<\/td>\n<td>Calibration fixture for PXIe-7890 and PXIe-7891 signal-level HIL modules<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<p>The PXIe-7890 uses several front-panel connectors for its different I\/O resources. Verify the required VHDCI breakout assemblies, QSFP cables, logic voltage, connector pinout and test-fixture wiring before ordering.<\/p>\n<h3>Signal-Level Inverter HIL Architecture<\/h3>\n<p>The PXIe-7890 is designed to connect a real inverter controller or motor-control ECU to a simulated power stage and traction motor. The actual high-voltage inverter and motor are replaced by mathematical models running deterministically on the FPGA.<\/p>\n<p>Analog inputs acquire controller feedback and command signals, while low-latency analog outputs return simulated current, voltage, resolver or other sensor information. Digital I\/O and high-speed serial interfaces support additional feedback, communication and synchronization requirements.<\/p>\n<h3>Xilinx Kintex UltraScale KU060 FPGA<\/h3>\n<p>The user-programmable KU060 FPGA provides the parallel processing resources required for deterministic power-electronics and motor-model execution. Calculations can operate directly between the input and output interfaces without relying on nondeterministic host-software timing.<\/p>\n<p>The FPGA includes 331,680 lookup tables, 2,760 DSP48 slices and 38 Mb of embedded block RAM. These resources support custom control logic, signal processing, plant models, communication protocols and high-speed closed-loop calculations.<\/p>\n<p>Some FPGA resources are reserved by the module interface and PCI Express infrastructure, so the resources available to a user application are slightly lower than the FPGA\u2019s total physical capacity.<\/p>\n<h3>Eight Simultaneous Analog Inputs<\/h3>\n<p>The PXIe-7890 provides eight differential analog input channels with 16-bit resolution and simultaneous sampling. Each channel can acquire at up to 2 MS\/s.<\/p>\n<p>Simultaneous conversion helps preserve the timing relationship between phase-current, DC-bus, command and feedback signals. This is important for multichannel control models that use several measurements during the same FPGA calculation step.<\/p>\n<h3>Programmable Analog Input Ranges<\/h3>\n<p>The analog inputs support selectable ranges of \u00b11 V, \u00b12 V, \u00b15 V, \u00b110 V and \u00b120 V. The range can be matched to the expected signal amplitude to balance headroom and measurement resolution.<\/p>\n<p>Use the smallest range that safely contains the complete signal, including normal transients and possible fault conditions. Do not rely on the selected measurement range as overvoltage protection.<\/p>\n<h3>Programmable Low-Latency Input Filtering<\/h3>\n<p>Programmable input filtering can reduce unwanted noise and aliasing while supporting the low latency required by real-time HIL models. Filter configuration should reflect the signal bandwidth and FPGA loop rate.<\/p>\n<p>Excessive filtering can add phase delay or suppress legitimate transient behavior. Validate the complete measurement path against the control system\u2019s frequency-response requirements.<\/p>\n<h3>Standard Analog Outputs<\/h3>\n<p>The standard analog outputs provide 16-bit voltage generation with a \u00b110 V range. They are suitable for simulated sensor outputs, references, diagnostic signals and other voltage commands that do not require the module\u2019s shortest output latency.<\/p>\n<p>Standard output latency includes the FPGA update path and analog circuitry. Total hardware latency is determined by adding the applicable update latency and analog latency.<\/p>\n<h3>Low-Latency Analog Outputs<\/h3>\n<p>The 16 low-latency analog outputs are optimized for fast signal-level HIL feedback. Their reduced update latency helps shorten the closed-loop delay between acquiring an ECU signal, executing the FPGA model and returning the simulated response.<\/p>\n<p>Channels 0 through 7 support both \u00b110 V and \u00b10.5 V ranges. Channels 8 through 15 support the \u00b110 V range. The smaller range can improve useful resolution for low-amplitude feedback signals.<\/p>\n<h3>Understanding Analog Output Latency<\/h3>\n<p>Total analog output latency consists of update latency plus analog latency. Calibrated operation applies stored scaling coefficients and therefore has slightly longer update latency than uncalibrated operation.<\/p>\n<table>\n<tbody>\n<tr>\n<th>\u0422\u0438\u043f \u0432\u044b\u0432\u043e\u0434\u0430<\/th>\n<th>Uncalibrated Total Latency<\/th>\n<th>Calibrated Total Latency<\/th>\n<\/tr>\n<tr>\n<td>Standard analog output<\/td>\n<td>Approximately 515 ns<\/td>\n<td>Approximately 535 ns<\/td>\n<\/tr>\n<tr>\n<td>Low-latency analog output<\/td>\n<td>Approximately 198 ns<\/td>\n<td>Approximately 218 ns<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<p>These figures describe the applicable hardware output path. The complete closed-loop latency also includes analog input conversion, FPGA model execution, synchronization and any external signal-conditioning delay.<\/p>\n<h3>64 Bidirectional Digital I\/O Channels<\/h3>\n<p>The PXIe-7890 provides 64 single-ended digital I\/O lines distributed across two 68-pin VHDCI connectors. Each connector carries half of the total digital channels.<\/p>\n<p>Direction is configurable per channel, allowing the FPGA application to combine inputs and outputs according to the test-system requirements. Digital signals can represent PWM states, enable commands, fault lines, encoder signals and general ECU control I\/O.<\/p>\n<h3>Selectable 3.3 V and 5 V Logic<\/h3>\n<p>The digital logic level can be selected as 3.3 V or 5 V in banks of 16 channels. All lines within a voltage bank use the same selected logic family.<\/p>\n<p>Confirm the required voltage before connecting the device under test. Applying an incompatible logic level may result in unreliable operation or damage to the PXIe-7890 or ECU.<\/p>\n<h3>10 MHz Digital Output Operation<\/h3>\n<p>Digital outputs support a maximum toggle rate of 10 MHz and can sink or source up to 4 mA per channel. This capability supports many control, status and moderate-speed pulse applications.<\/p>\n<p>The digital I\/O is not intended to drive high-current loads directly. Use suitable buffers, level translators or external drivers when the connected circuit requires more current or a different electrical standard.<\/p>\n<h3>Two QSFP High-Speed Serial Interfaces<\/h3>\n<p>Two QSFP connectors provide high-speed serial communication through the FPGA\u2019s multi-gigabit transceivers. These ports can exchange data with compatible FPGA modules, simulation hardware or custom interfaces.<\/p>\n<p>The exact line rate, protocol and channel configuration depend on the FPGA design and connected equipment. Cable type, transceiver compatibility and link configuration must be confirmed for the intended application.<\/p>\n<h3>Aurora Protocol Support<\/h3>\n<p>NI provides an Aurora-based sample project and CLIP for the PXIe-7890. This reference design can be used as a starting point for low-overhead, high-speed serial communication through the QSFP interfaces.<\/p>\n<p>The example can be generated using the FlexRIO Integrated I\/O Getting Started example in LabVIEW. Application-specific FPGA development is still required to integrate the link with the final motor model or HIL architecture.<\/p>\n<h3>4 GB Onboard DRAM<\/h3>\n<p>The module includes 4 GB of onboard DRAM divided into two 2 GB banks. The memory can buffer waveform data, model parameters, lookup tables and other information used by the FPGA application.<\/p>\n<p>Efficient memory access is important when the FPGA model requires high throughput. The achievable application bandwidth depends on access patterns, FPGA design and competition between memory clients.<\/p>\n<h3>DMA Data Transfer<\/h3>\n<p>Up to 60 DMA channels can transfer data between the FPGA and host memory. DMA can be used for waveform streaming, test data capture, configuration updates and diagnostic information.<\/p>\n<p>The host controller, PXI Express chassis topology and other modules sharing the bus affect sustainable data-transfer performance. Critical HIL feedback loops should remain in FPGA hardware rather than depend on host communication.<\/p>\n<h3>Traction-Motor Model Execution<\/h3>\n<p>The KU060 FPGA can execute mathematical models representing traction motors, including electrical and mechanical behavior. Multiple model components can operate in parallel to achieve short deterministic time steps.<\/p>\n<p>The exact number and complexity of motor models depend on the selected model, numerical method, FPGA clock rate, resource usage and I\/O requirements.<\/p>\n<h3>Inverter Controller Validation<\/h3>\n<p>The PXIe-7890 can validate an inverter controller without connecting it to a high-power inverter and motor. The controller receives simulated feedback while its commands are captured and evaluated by the FPGA model.<\/p>\n<p>This arrangement helps test normal operation, startup, shutdown, torque commands, speed transitions and error handling in a controlled laboratory environment.<\/p>\n<h3>Electric Vehicle Powertrain Testing<\/h3>\n<p>Electric vehicle test systems can use the module to simulate traction-motor and inverter behavior at signal level. The real ECU executes its production control software while the FPGA recreates the response of the electrical powertrain.<\/p>\n<p>Signal-level testing reduces the risk and energy associated with testing every software condition on a physical high-voltage dynamometer.<\/p>\n<h3>Fault and Corner-Case Simulation<\/h3>\n<p>FPGA logic can introduce simulated overcurrent, overspeed, sensor offset, missing feedback and other abnormal operating conditions. These repeatable scenarios help verify diagnostic and protective behavior.<\/p>\n<p>Electrical faults that require changing actual ECU wiring or applying abnormal voltages may require separate fault insertion and signal-conditioning hardware.<\/p>\n<h3>ECU Regression Testing<\/h3>\n<p>Automated regression systems can replay the same operating profiles after software or calibration changes. Consistent simulated conditions make differences between ECU versions easier to identify.<\/p>\n<p>Test sequences can record analog measurements, digital states, model variables and diagnostic results for comparison and reporting.<\/p>\n<h3>PXI Timing and Synchronization<\/h3>\n<p>The FPGA can use the PXI Express 100 MHz reference clock. PXI timing and triggering resources allow the module to coordinate with data acquisition, communication, fault insertion and measurement instruments.<\/p>\n<p>Shared timing is valuable when inverter commands, simulated feedback, network messages and external measurements must be correlated on a common timebase.<\/p>\n<h3>LabVIEW FPGA Integration<\/h3>\n<p>LabVIEW FPGA allows engineers to create custom deterministic processing and I\/O logic for the KU060 FPGA. The application can implement plant models, control interfaces, triggers, fault logic and custom serial communication.<\/p>\n<p>FPGA development requires compatible LabVIEW FPGA and FlexRIO software. Confirm software-version, operating-system, controller and compilation-service compatibility before configuring the system.<\/p>\n<h3>LabVIEW Real-Time Integration<\/h3>\n<p>A compatible PXI real-time controller can manage test sequencing, parameter updates, network communication, data logging and interaction with the FPGA model.<\/p>\n<p>Time-critical calculations remain on the FPGA, while the real-time controller handles tasks that require deterministic sequencing but do not need submicrosecond execution.<\/p>\n<h3>Typical PXIe-7890 Applications<\/h3>\n<ul>\n<li>Signal-level inverter HIL testing<\/li>\n<li>Traction-motor controller validation<\/li>\n<li>Electric vehicle powertrain development<\/li>\n<li>Motor-control ECU regression testing<\/li>\n<li>Power-electronics controller verification<\/li>\n<li>FPGA-based plant simulation<\/li>\n<li>Resolver and sensor signal simulation<\/li>\n<li>PWM command acquisition<\/li>\n<li>Fault and corner-case simulation<\/li>\n<li>Closed-loop embedded controller testing<\/li>\n<li>Rapid control prototyping<\/li>\n<li>Custom high-speed serial communication<\/li>\n<li>Multichannel deterministic signal generation<\/li>\n<li>Automotive and aerospace controller testing<\/li>\n<\/ul>\n<h3>PXIe-7890 Troubleshooting<\/h3>\n<h4>The PXIe-7890 is not detected in NI MAX<\/h4>\n<p>Confirm that the module is fully installed in a compatible PXI Express slot. Check chassis power, controller communication and FlexRIO driver installation, then restart the system and rescan the hardware.<\/p>\n<h4>The FPGA bitfile cannot be loaded<\/h4>\n<p>Verify that the bitfile was compiled for the PXIe-7890 and KU060 target. Confirm compatibility between the bitfile, FlexRIO driver, LabVIEW FPGA version and host application.<\/p>\n<h4>An analog input signal is clipped<\/h4>\n<p>Check the selected input range and actual signal amplitude. Select a larger range when the signal, including transients and offset, exceeds the configured limits.<\/p>\n<h4>Analog input data contains excessive noise<\/h4>\n<p>Review grounding, shielding, differential wiring and filter configuration. Keep low-level analog wiring separated from digital and switching-power signals.<\/p>\n<h4>A low-latency analog output does not use the \u00b10.5 V range<\/h4>\n<p>The \u00b10.5 V range is available only on low-latency channels 0 through 7. Low-latency channels 8 through 15 support the \u00b110 V range.<\/p>\n<h4>Analog output latency is higher than expected<\/h4>\n<p>Confirm whether calibrated or uncalibrated mode is used. Include both update latency and analog latency, as well as FPGA computation and synchronization delays.<\/p>\n<h4>Digital I\/O uses the wrong logic voltage<\/h4>\n<p>Check the voltage selection for the corresponding 16-channel bank. All channels in the bank must use the same 3.3 V or 5 V logic setting.<\/p>\n<h4>A digital output cannot drive the connected load<\/h4>\n<p>The maximum output current is 4 mA per channel. Use an external buffer or driver for loads requiring more current.<\/p>\n<h4>The QSFP serial link does not establish communication<\/h4>\n<p>Verify cable and transceiver compatibility, FPGA protocol configuration, line rate, reference clock and lane assignment. Confirm that both ends use compatible Aurora or custom serial-link settings.<\/p>\n<h4>Host streaming throughput is lower than expected<\/h4>\n<p>Review DMA configuration, chassis PCI Express topology, controller performance and traffic from other modules. Keep deterministic closed-loop calculations on the FPGA.<\/p>\n<h4>The HIL model cannot meet its required loop rate<\/h4>\n<p>Review FPGA timing reports, resource utilization, memory access and arithmetic architecture. Pipeline the calculations, parallelize independent operations or simplify the numerical model where appropriate.<\/p>\n<h3>PXIe-7890 Comparison with Related FPGA Modules<\/h3>\n<table>\n<tbody>\n<tr>\n<th>\u041c\u043e\u0434\u0435\u043b\u044c<\/th>\n<th>Primary Configuration<\/th>\n<th>Best Suited For<\/th>\n<\/tr>\n<tr>\n<td>PXIe-7890<\/td>\n<td>KU060 FPGA, analog I\/O, low-latency AO, 64 DIO and 2 QSFP<\/td>\n<td>Signal-level inverter and traction-motor HIL<\/td>\n<\/tr>\n<tr>\n<td>PXIe-7891<\/td>\n<td>Signal-level HIL FPGA multifunction architecture<\/td>\n<td>Related HIL systems requiring the PXIe-7891 I\/O configuration<\/td>\n<\/tr>\n<tr>\n<td>PXIe-7981<\/td>\n<td>Related FPGA-based HIL and high-speed serial platform<\/td>\n<td>Applications requiring its specific FPGA and interface resources<\/td>\n<\/tr>\n<tr>\n<td>PXIe-7915<\/td>\n<td>FlexRIO FPGA coprocessor<\/td>\n<td>Custom FPGA processing with separately selected I\/O modules<\/td>\n<\/tr>\n<tr>\n<td>PXIe-7868<\/td>\n<td>Multifunction reconfigurable I\/O<\/td>\n<td>General-purpose FPGA control and lower-complexity HIL systems<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<h3>PXIe-7890 vs General-Purpose FlexRIO Modules<\/h3>\n<p>The PXIe-7890 integrates analog inputs, standard and low-latency analog outputs, digital I\/O and high-speed serial ports for signal-level inverter HIL. General FlexRIO FPGA modules may require separately selected adapter modules or additional signal-conditioning hardware.<\/p>\n<p>Choose the PXIe-7890 when its integrated I\/O combination matches a motor-control or power-electronics test application. Select a general-purpose FlexRIO platform when a different analog, digital or RF interface must be combined with FPGA processing.<\/p>\n<h3>PXIe-7890 vs PXIe-7891<\/h3>\n<p>The PXIe-7890 and PXIe-7891 belong to the same signal-level HIL FPGA product family. Their exact I\/O resources and intended system roles should be compared against the required motor models, feedback signals, digital channels and serial interfaces.<\/p>\n<p>Select the model only after confirming the official pinout, FPGA design target, breakout hardware and software examples required by the HIL application.<\/p>\n<h3>Recommended Related Products<\/h3>\n<ul>\n<li><a href=\"https:\/\/pxisource.com\/ru\/product\/pxie-7891\/\">PXIe-7891 Signal-Level HIL FlexRIO Module<\/a><\/li>\n<li><a href=\"https:\/\/pxisource.com\/ru\/product\/pxie-7981\/\">PXIe-7981 FPGA HIL Module<\/a><\/li>\n<li><a href=\"https:\/\/pxisource.com\/ru\/product\/pxie-7915\/\">PXIe-7915 FlexRIO FPGA Coprocessor Module<\/a><\/li>\n<li><a href=\"https:\/\/pxisource.com\/ru\/product\/pxie-7868\/\">PXIe-7868 Multifunction Reconfigurable I\/O Module<\/a><\/li>\n<li><a href=\"https:\/\/pxisource.com\/ru\/product-category\/%d0%bd%d0%b8\/pxi-%d1%81%d0%b8%d1%81%d1%82%d0%b5%d0%bc%d1%81\/%d0%bc%d0%be%d0%b4%d1%83%d0%bb%d0%b8-pxi\/\">View More NI PXI and PXI Express Modules<\/a><\/li>\n<\/ul>\n<h3>Selecting the Right HIL FPGA Module<\/h3>\n<p>Choose the PXIe-7890 when the application requires eight simultaneous analog inputs, standard and low-latency analog outputs, 64 bidirectional digital channels, QSFP serial connectivity and a KU060 FPGA.<\/p>\n<p>Before ordering, confirm the number and type of analog outputs, voltage ranges, DIO logic voltage, FPGA resource requirements, QSFP protocol, connector pinout and compatible software versions.<\/p>\n<h3>Why Choose the PXIe-7890?<\/h3>\n<ul>\n<li>Integrates analog, digital and serial I\/O in one FPGA module<\/li>\n<li>Provides low-latency analog feedback for inverter HIL<\/li>\n<li>Includes eight simultaneous 16-bit analog inputs<\/li>\n<li>Provides 32 total analog output channels<\/li>\n<li>Offers 64 configurable digital I\/O lines<\/li>\n<li>Supports 3.3 V and 5 V digital logic<\/li>\n<li>Includes two QSFP serial interfaces<\/li>\n<li>Uses a powerful Kintex UltraScale KU060 FPGA<\/li>\n<li>Provides 4 GB of onboard DRAM<\/li>\n<li>Supports PXI timing and LabVIEW FPGA customization<\/li>\n<\/ul>\n<h3>Frequently Asked Questions<\/h3>\n<h4>What is the PXIe-7890?<\/h4>\n<p>The PXIe-7890 is an FPGA-based PXI FlexRIO multifunction I\/O module designed primarily for signal-level inverter and traction-motor hardware-in-the-loop testing.<\/p>\n<h4>What is the PXIe-7890 part number?<\/h4>\n<p>The standard NI part number for the PXIe-7890 is <strong>787713-01<\/strong>.<\/p>\n<h4>Which FPGA does the module use?<\/h4>\n<p>The PXIe-7890 uses a user-programmable Xilinx Kintex UltraScale KU060 FPGA.<\/p>\n<h4>How many analog inputs does it provide?<\/h4>\n<p>The module provides eight simultaneously sampled differential analog inputs with 16-bit resolution and rates up to 2 MS\/s.<\/p>\n<h4>Which analog input ranges are supported?<\/h4>\n<p>The selectable input ranges are \u00b11 V, \u00b12 V, \u00b15 V, \u00b110 V and \u00b120 V.<\/p>\n<h4>How many analog outputs does the PXIe-7890 provide?<\/h4>\n<p>The detailed hardware configuration provides 16 standard analog outputs and 16 low-latency analog outputs, for 32 total voltage-output channels.<\/p>\n<h4>What is the maximum analog output update rate?<\/h4>\n<p>The maximum published analog update rate is 4 MS\/s.<\/p>\n<h4>Which low-latency outputs support the \u00b10.5 V range?<\/h4>\n<p>Low-latency channels 0 through 7 support both \u00b10.5 V and \u00b110 V ranges. Channels 8 through 15 support \u00b110 V.<\/p>\n<h4>How many digital I\/O channels are available?<\/h4>\n<p>The module provides 64 bidirectional, single-ended digital I\/O channels.<\/p>\n<h4>Does the DIO support 3.3 V and 5 V logic?<\/h4>\n<p>Yes. Logic voltage is selectable as 3.3 V or 5 V for each group of 16 digital channels.<\/p>\n<h4>What is the maximum digital output current?<\/h4>\n<p>Each digital output can sink or source up to 4 mA.<\/p>\n<h4>What are the QSFP ports used for?<\/h4>\n<p>The two QSFP ports expose FPGA multi-gigabit serial resources for Aurora or other application-specific high-speed communication.<\/p>\n<h4>How much onboard DRAM does the module provide?<\/h4>\n<p>The PXIe-7890 includes 4 GB of onboard DRAM organized as two 2 GB banks.<\/p>\n<h4>Does the PXIe-7890 support Aurora?<\/h4>\n<p>Yes. NI provides an Aurora-based sample project and CLIP that can be generated through the FlexRIO Integrated I\/O Getting Started example.<\/p>\n<h4>Which software is required?<\/h4>\n<p>The module uses NI FlexRIO software and can be programmed with LabVIEW FPGA. A compatible LabVIEW Real-Time environment may also be used for complete HIL systems.<\/p>\n<h4>What is the recommended calibration interval?<\/h4>\n<p>The published calibration interval is two years.<\/p>\n<h3>Request a Quote for the PXIe-7890<\/h3>\n<p>Contact us for current availability, lead time and project pricing for the <strong>PXIe-7890 KU060 FPGA FlexRIO Multifunction I\/O Module<\/strong>. We can also help confirm the calibration fixture, compatible PXI Express chassis, VHDCI and QSFP connectivity, software requirements and related FPGA modules for your inverter HIL system.<\/p>","protected":false},"excerpt":{"rendered":"<p>PXIe-7890 KU060 FPGA FlexRIO Multifunction I\/O Module The PXIe-7890 is a PXI Express FlexRIO multifunction I\/O module designed for signal-level<\/p>","protected":false},"featured_media":31829,"template":"","meta":{"_acf_changed":false},"product_brand":[18],"product_cat":[667],"product_tag":[],"class_list":["post-32383","product","type-product","status-publish","has-post-thumbnail","product_brand-national-instruments","product_cat-pxi-modules","first","instock","shipping-taxable","purchasable","product-type-simple"],"acf":[],"yoast_head":"<!-- This site is optimized with the Yoast SEO Premium plugin v25.0 (Yoast SEO v28.1) - https:\/\/yoast.com\/product\/yoast-seo-premium-wordpress\/ -->\n<title>NI PXIe-7890 PXI FlexRIO Multifunction I\/O Module 787713-01, In Stock | Project Pricing<\/title>\n<meta name=\"description\" content=\"The PXIe-7890 combines eight analog inputs, 32 analog outputs, 64 DIO, two QSFP ports and a KU060 FPGA for signal-level inverter HIL testing.\" \/>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/pxisource.com\/ru\/product\/pxie-7890\/\" \/>\n<meta property=\"og:locale\" content=\"ru_RU\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"PXIe-7890\" \/>\n<meta property=\"og:description\" content=\"The PXIe-7890 combines eight analog inputs, 32 analog outputs, 64 DIO, two QSFP ports and a KU060 FPGA for signal-level inverter HIL testing.\" \/>\n<meta property=\"og:url\" content=\"https:\/\/pxisource.com\/ru\/product\/pxie-7890\/\" \/>\n<meta property=\"og:site_name\" content=\"PXI Source\" \/>\n<meta property=\"article:publisher\" content=\"https:\/\/www.facebook.com\/profile.php?id=61582573040385\" \/>\n<meta property=\"article:modified_time\" content=\"2026-08-30T06:04:08+00:00\" \/>\n<meta property=\"og:image\" content=\"https:\/\/pxisource.com\/wp-content\/uploads\/2026\/04\/PXIe-7890.webp\" \/>\n\t<meta property=\"og:image:width\" content=\"650\" \/>\n\t<meta property=\"og:image:height\" content=\"650\" \/>\n\t<meta property=\"og:image:type\" content=\"image\/webp\" \/>\n<meta name=\"twitter:card\" content=\"summary_large_image\" \/>\n<meta name=\"twitter:label1\" content=\"\u0426\u0435\u043d\u0430\" \/>\n\t<meta name=\"twitter:data1\" content=\"&#036;21,064.00\" \/>\n\t<meta name=\"twitter:label2\" content=\"\u0414\u043e\u0441\u0442\u0443\u043f\u043d\u043e\u0441\u0442\u044c\" \/>\n\t<meta name=\"twitter:data2\" content=\"\u0412 \u043d\u0430\u043b\u0438\u0447\u0438\u0438\" \/>\n<script type=\"application\/ld+json\" class=\"yoast-schema-graph\">{\"@context\":\"https:\\\/\\\/schema.org\",\"@graph\":[{\"@type\":\"WebPage\",\"@id\":\"https:\\\/\\\/pxisource.com\\\/product\\\/pxie-7890\\\/\",\"url\":\"https:\\\/\\\/pxisource.com\\\/product\\\/pxie-7890\\\/\",\"name\":\"NI PXIe-7890 PXI FlexRIO Multifunction I\\\/O Module 787713-01, In Stock | Project Pricing\",\"isPartOf\":{\"@id\":\"https:\\\/\\\/pxisource.com\\\/#website\"},\"primaryImageOfPage\":{\"@id\":\"https:\\\/\\\/pxisource.com\\\/product\\\/pxie-7890\\\/#primaryimage\"},\"image\":{\"@id\":\"https:\\\/\\\/pxisource.com\\\/product\\\/pxie-7890\\\/#primaryimage\"},\"thumbnailUrl\":\"https:\\\/\\\/pxisource.com\\\/wp-content\\\/uploads\\\/2026\\\/04\\\/PXIe-7890.webp\",\"datePublished\":\"2026-04-28T02:27:45+00:00\",\"dateModified\":\"2026-08-30T06:04:08+00:00\",\"description\":\"The PXIe-7890 combines eight analog inputs, 32 analog outputs, 64 DIO, two QSFP ports and a KU060 FPGA for signal-level inverter HIL testing.\",\"breadcrumb\":{\"@id\":\"https:\\\/\\\/pxisource.com\\\/product\\\/pxie-7890\\\/#breadcrumb\"},\"inLanguage\":\"ru-RU\",\"potentialAction\":[{\"@type\":\"ReadAction\",\"target\":[\"https:\\\/\\\/pxisource.com\\\/product\\\/pxie-7890\\\/\"]}]},{\"@type\":\"ImageObject\",\"inLanguage\":\"ru-RU\",\"@id\":\"https:\\\/\\\/pxisource.com\\\/product\\\/pxie-7890\\\/#primaryimage\",\"url\":\"https:\\\/\\\/pxisource.com\\\/wp-content\\\/uploads\\\/2026\\\/04\\\/PXIe-7890.webp\",\"contentUrl\":\"https:\\\/\\\/pxisource.com\\\/wp-content\\\/uploads\\\/2026\\\/04\\\/PXIe-7890.webp\",\"width\":650,\"height\":650,\"caption\":\"PXIe-7890\"},{\"@type\":\"BreadcrumbList\",\"@id\":\"https:\\\/\\\/pxisource.com\\\/product\\\/pxie-7890\\\/#breadcrumb\",\"itemListElement\":[{\"@type\":\"ListItem\",\"position\":1,\"name\":\"Home\",\"item\":\"https:\\\/\\\/pxisource.com\\\/\"},{\"@type\":\"ListItem\",\"position\":2,\"name\":\"\u5546\u5e97\",\"item\":\"https:\\\/\\\/pxisource.com\\\/shop\\\/\"},{\"@type\":\"ListItem\",\"position\":3,\"name\":\"PXIe-7890\"}]},{\"@type\":\"WebSite\",\"@id\":\"https:\\\/\\\/pxisource.com\\\/#website\",\"url\":\"https:\\\/\\\/pxisource.com\\\/\",\"name\":\"PXI Systems\",\"description\":\"PXI, PXIe and Modular Test Equipment\",\"potentialAction\":[{\"@type\":\"SearchAction\",\"target\":{\"@type\":\"EntryPoint\",\"urlTemplate\":\"https:\\\/\\\/pxisource.com\\\/?s={search_term_string}\"},\"query-input\":{\"@type\":\"PropertyValueSpecification\",\"valueRequired\":true,\"valueName\":\"search_term_string\"}}],\"inLanguage\":\"ru-RU\"}]}<\/script>\n<meta property=\"product:brand\" content=\"National Instruments\" \/>\n<meta property=\"product:price:amount\" content=\"21064.00\" \/>\n<meta property=\"product:price:currency\" content=\"USD\" \/>\n<meta property=\"og:availability\" content=\"instock\" \/>\n<meta property=\"product:availability\" content=\"instock\" \/>\n<meta property=\"product:condition\" content=\"new\" \/>\n<!-- \/ Yoast SEO Premium plugin. -->","yoast_head_json":{"title":"NI PXIe-7890 PXI FlexRIO Multifunction I\/O Module 787713-01, In Stock | Project Pricing","description":"The PXIe-7890 combines eight analog inputs, 32 analog outputs, 64 DIO, two QSFP ports and a KU060 FPGA for signal-level inverter HIL testing.","robots":{"index":"index","follow":"follow","max-snippet":"max-snippet:-1","max-image-preview":"max-image-preview:large","max-video-preview":"max-video-preview:-1"},"canonical":"https:\/\/pxisource.com\/ru\/product\/pxie-7890\/","og_locale":"ru_RU","og_type":"article","og_title":"PXIe-7890","og_description":"The PXIe-7890 combines eight analog inputs, 32 analog outputs, 64 DIO, two QSFP ports and a KU060 FPGA for signal-level inverter HIL testing.","og_url":"https:\/\/pxisource.com\/ru\/product\/pxie-7890\/","og_site_name":"PXI Source","article_publisher":"https:\/\/www.facebook.com\/profile.php?id=61582573040385","article_modified_time":"2026-08-30T06:04:08+00:00","og_image":[{"width":650,"height":650,"url":"https:\/\/pxisource.com\/wp-content\/uploads\/2026\/04\/PXIe-7890.webp","type":"image\/webp"}],"twitter_card":"summary_large_image","twitter_misc":{"\u0426\u0435\u043d\u0430":"&#36;21,064.00","\u0414\u043e\u0441\u0442\u0443\u043f\u043d\u043e\u0441\u0442\u044c":"\u0412 \u043d\u0430\u043b\u0438\u0447\u0438\u0438"},"schema":{"@context":"https:\/\/schema.org","@graph":[{"@type":"WebPage","@id":"https:\/\/pxisource.com\/product\/pxie-7890\/","url":"https:\/\/pxisource.com\/product\/pxie-7890\/","name":"NI PXIe-7890 PXI FlexRIO Multifunction I\/O Module 787713-01, In Stock | Project Pricing","isPartOf":{"@id":"https:\/\/pxisource.com\/#website"},"primaryImageOfPage":{"@id":"https:\/\/pxisource.com\/product\/pxie-7890\/#primaryimage"},"image":{"@id":"https:\/\/pxisource.com\/product\/pxie-7890\/#primaryimage"},"thumbnailUrl":"https:\/\/pxisource.com\/wp-content\/uploads\/2026\/04\/PXIe-7890.webp","datePublished":"2026-04-28T02:27:45+00:00","dateModified":"2026-08-30T06:04:08+00:00","description":"The PXIe-7890 combines eight analog inputs, 32 analog outputs, 64 DIO, two QSFP ports and a KU060 FPGA for signal-level inverter HIL testing.","breadcrumb":{"@id":"https:\/\/pxisource.com\/product\/pxie-7890\/#breadcrumb"},"inLanguage":"ru-RU","potentialAction":[{"@type":"ReadAction","target":["https:\/\/pxisource.com\/product\/pxie-7890\/"]}]},{"@type":"ImageObject","inLanguage":"ru-RU","@id":"https:\/\/pxisource.com\/product\/pxie-7890\/#primaryimage","url":"https:\/\/pxisource.com\/wp-content\/uploads\/2026\/04\/PXIe-7890.webp","contentUrl":"https:\/\/pxisource.com\/wp-content\/uploads\/2026\/04\/PXIe-7890.webp","width":650,"height":650,"caption":"PXIe-7890"},{"@type":"BreadcrumbList","@id":"https:\/\/pxisource.com\/product\/pxie-7890\/#breadcrumb","itemListElement":[{"@type":"ListItem","position":1,"name":"Home","item":"https:\/\/pxisource.com\/"},{"@type":"ListItem","position":2,"name":"\u5546\u5e97","item":"https:\/\/pxisource.com\/shop\/"},{"@type":"ListItem","position":3,"name":"PXIe-7890"}]},{"@type":"WebSite","@id":"https:\/\/pxisource.com\/#website","url":"https:\/\/pxisource.com\/","name":"\u0421\u0438\u0441\u0442\u0435\u043c\u044b PXI","description":"PXI, PXIe and Modular Test Equipment","potentialAction":[{"@type":"SearchAction","target":{"@type":"EntryPoint","urlTemplate":"https:\/\/pxisource.com\/?s={search_term_string}"},"query-input":{"@type":"PropertyValueSpecification","valueRequired":true,"valueName":"search_term_string"}}],"inLanguage":"ru-RU"}]},"product_brand":"National Instruments","product_price_amount":"21064.00","product_price_currency":"USD","og_availability":"instock","product_availability":"instock","product_condition":"new"},"_links":{"self":[{"href":"https:\/\/pxisource.com\/ru\/wp-json\/wp\/v2\/product\/32383","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/pxisource.com\/ru\/wp-json\/wp\/v2\/product"}],"about":[{"href":"https:\/\/pxisource.com\/ru\/wp-json\/wp\/v2\/types\/product"}],"version-history":[{"count":3,"href":"https:\/\/pxisource.com\/ru\/wp-json\/wp\/v2\/product\/32383\/revisions"}],"predecessor-version":[{"id":35715,"href":"https:\/\/pxisource.com\/ru\/wp-json\/wp\/v2\/product\/32383\/revisions\/35715"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/pxisource.com\/ru\/wp-json\/wp\/v2\/media\/31829"}],"wp:attachment":[{"href":"https:\/\/pxisource.com\/ru\/wp-json\/wp\/v2\/media?parent=32383"}],"wp:term":[{"taxonomy":"product_brand","embeddable":true,"href":"https:\/\/pxisource.com\/ru\/wp-json\/wp\/v2\/product_brand?post=32383"},{"taxonomy":"product_cat","embeddable":true,"href":"https:\/\/pxisource.com\/ru\/wp-json\/wp\/v2\/product_cat?post=32383"},{"taxonomy":"product_tag","embeddable":true,"href":"https:\/\/pxisource.com\/ru\/wp-json\/wp\/v2\/product_tag?post=32383"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}