{"id":30323,"date":"2025-09-26T13:40:59","date_gmt":"2025-09-26T05:40:59","guid":{"rendered":"https:\/\/pxisource.com\/?post_type=product&#038;p=30323"},"modified":"2026-08-27T21:47:55","modified_gmt":"2026-08-27T13:47:55","slug":"%d0%bf%d0%ba%d1%81%d0%b8%d0%b5-6571","status":"publish","type":"product","link":"https:\/\/pxisource.com\/ru\/product\/pxie-6571\/","title":{"rendered":"PXIe-6571"},"content":{"rendered":"<h3>Product Introduction<\/h3>\n<p>\n\u0417\u0435\u043c\u043b\u044f <strong>PXIe\u20116571<\/strong> \u044f\u0432\u043b\u044f\u0435\u0442\u0441\u044f <strong>100 MVector\/s PXI Express digital pattern instrument<\/strong> designed for semiconductor validation, characterization and production testing. It is available in eight-channel and 32-channel configurations.\n<\/p>\n<p>\nThe PXIe\u20116571 integrates digital pattern generation and comparison, per-pin timing, programmable voltage levels, active loads and per-pin parametric measurement units into a single-slot PXI Express module.\n<\/p>\n<p>\nWhen used with the NI Digital Pattern Editor and NI-Digital Pattern Driver, engineers can configure pin maps, voltage levels, timing sets, pattern files, test specifications and semiconductor test flows within a unified software environment.\n<\/p>\n<h3>Product Overview<\/h3>\n<p>\n\u0417\u0435\u043c\u043b\u044f <strong>National Instruments PXIe\u20116571<\/strong> belongs to the NI PXI Digital Pattern Instrument family.\n<\/p>\n<p>\nThe two main configurations are:\n<\/p>\n<table>\n<tr>\n<th>Part Number<\/th>\n<th>\u041a\u043e\u043d\u0444\u0438\u0433\u0443\u0440\u0430\u0446\u0438\u044f<\/th>\n<\/tr>\n<tr>\n<td><strong>786320\u201101<\/strong><\/td>\n<td>32-Channel PXIe\u20116571 Digital Pattern Instrument<\/td>\n<\/tr>\n<tr>\n<td><strong>786320\u201102<\/strong><\/td>\n<td>8-Channel PXIe\u20116571 Digital Pattern Instrument<\/td>\n<\/tr>\n<\/table>\n<p>\nA typical semiconductor test architecture is:\n<\/p>\n<p>\n<strong>Digital Pattern Editor \/ Test Program \u2192 PXIe\u20116571 \u2192 Load Board \/ Interface \u2192 Semiconductor DUT<\/strong>\n<\/p>\n<p>\nThe instrument applies programmed digital levels and patterns to the DUT, compares returned pin states against expected values and records failures, captured data and parametric measurements.\n<\/p>\n<h3>Key Features<\/h3>\n<h4>8-Channel or 32-Channel Configurations<\/h4>\n<p>\nThe PXIe\u20116571 is available with either eight or 32 digital test channels.\n<\/p>\n<p>\nThe 32-channel version is suitable for:\n<\/p>\n<ul>\n<li>Higher pin-count semiconductor devices<\/li>\n<li>Parallel digital interfaces<\/li>\n<li>Multi-site production test<\/li>\n<li>Mixed-signal IC validation<\/li>\n<li>RF front-end module testing<\/li>\n<\/ul>\n<p>\nThe eight-channel version is optimized for lower-channel-count benchtop characterization, laboratory validation and cost-sensitive test systems.\n<\/p>\n<h4>100 MVector\/s Maximum Vector Rate<\/h4>\n<p>\nThe PXIe\u20116571 supports a maximum vector rate of <strong>100 MVector\/s<\/strong>, corresponding to a minimum vector period of 10 ns.\n<\/p>\n<p>\nThe vector architecture allows each test cycle to define:\n<\/p>\n<ul>\n<li>Pin drive states<\/li>\n<li>Expected compare states<\/li>\n<li>Timing set selection<\/li>\n<li>Pattern opcodes<\/li>\n<li>Source and capture behavior<\/li>\n<li>Sequencer operations<\/li>\n<\/ul>\n<h4>Up to 200 Mb\/s Data Rate<\/h4>\n<p>\nThe instrument supports data rates up to <strong>200 Mb\/s<\/strong> using supported timing and edge-multiplier configurations.\n<\/p>\n<p>\nThis capability is useful for testing digital interfaces that require more than one pin-state transition within a vector period.\n<\/p>\n<h4>Clock Generation up to 160 MHz<\/h4>\n<p>\nThe PXIe\u20116571 can generate clock signals at rates up to <strong>160 MHz<\/strong> under supported timing configurations.\n<\/p>\n<p>\nClock rates above 133 MHz may use a non-50% duty cycle. The required duty cycle, edge placement and DUT timing specifications should be verified during test-program development.\n<\/p>\n<h4>Programmable Digital Voltage Levels<\/h4>\n<p>\nThe digital pin electronics support voltage levels across a range of approximately <strong>\u22122 V to +6 V<\/strong>.\n<\/p>\n<p>\nProgrammable per-pin levels can include:\n<\/p>\n<ul>\n<li>Drive-high voltage<\/li>\n<li>Drive-low voltage<\/li>\n<li>Compare-high threshold<\/li>\n<li>Compare-low threshold<\/li>\n<li>Termination voltage<\/li>\n<li>Active-load commutation voltage<\/li>\n<\/ul>\n<p>\nThis flexibility allows one module to test devices using different logic families and supply voltages.\n<\/p>\n<h4>Per-Pin Parametric Measurement Units<\/h4>\n<p>\nEach digital channel includes a per-pin parametric measurement unit for DC characterization.\n<\/p>\n<p>\nPPMU functions can include:\n<\/p>\n<ul>\n<li>Force voltage and measure current<\/li>\n<li>Force current and measure voltage<\/li>\n<li>Input leakage measurement<\/li>\n<li>Output voltage measurement<\/li>\n<li>Continuity testing<\/li>\n<li>Open and short detection<\/li>\n<li>Pin-current characterization<\/li>\n<\/ul>\n<p>\nThe documented PPMU measurement voltage range extends from approximately \u22122 V to +6 V, while supported force-voltage operation can extend to approximately +7 V.\n<\/p>\n<h4>16 mA Active Load<\/h4>\n<p>\nThe PXIe\u20116571 provides an active-load capability of up to <strong>16 mA<\/strong> for supported semiconductor output testing.\n<\/p>\n<p>\nActive loads can help validate DUT output behavior by applying a programmable current load and comparing the resulting pin voltage against defined thresholds.\n<\/p>\n<h4>Flexible Pattern Timing<\/h4>\n<p>\nThe PXIe\u20116571 provides programmable timing sets for defining when each pin drives data, returns to a level and compares DUT output states.\n<\/p>\n<p>\nTiming features include:\n<\/p>\n<ul>\n<li>Up to 31 timing sets<\/li>\n<li>39.0625 ps edge-placement resolution<\/li>\n<li>Per-pin edge timing<\/li>\n<li>Multiple drive formats<\/li>\n<li>Vector-by-vector timing-set selection<\/li>\n<li>Edge-multiplier support<\/li>\n<\/ul>\n<h4>Multiple Drive Formats<\/h4>\n<p>\nSupported digital drive formats include:\n<\/p>\n<ul>\n<li>Non-Return<\/li>\n<li>Return to Low<\/li>\n<li>Return to High<\/li>\n<li>Surround by Complement<\/li>\n<\/ul>\n<p>\nThe correct drive format depends on the DUT protocol, required pulse shape and timing definition.\n<\/p>\n<h4>Pattern Sequencing and Flow Control<\/h4>\n<p>\nThe pattern sequencer supports opcodes and control structures for building reusable semiconductor test patterns.\n<\/p>\n<p>\nPattern execution can include:\n<\/p>\n<ul>\n<li>Loops<\/li>\n<li>Conditional jumps<\/li>\n<li>Subroutines<\/li>\n<li>Sequencer flags<\/li>\n<li>Sequencer registers<\/li>\n<li>Pattern labels<\/li>\n<li>Source and capture operations<\/li>\n<li>Test-program handshaking<\/li>\n<\/ul>\n<h4>Digital Pattern Editor<\/h4>\n<p>\nThe PXIe\u20116571 includes support for the NI Digital Pattern Editor, which provides an interactive environment for developing and debugging semiconductor digital tests.\n<\/p>\n<p>\nThe editor can be used to configure:\n<\/p>\n<ul>\n<li>Pin maps<\/li>\n<li>Pin groups<\/li>\n<li>Voltage levels<\/li>\n<li>Timing sets<\/li>\n<li>Test specifications<\/li>\n<li>Digital patterns<\/li>\n<li>Source waveforms<\/li>\n<li>Capture waveforms<\/li>\n<\/ul>\n<h3>Technical Specifications<\/h3>\n<table>\n<tr>\n<th>\u041f\u0430\u0440\u0430\u043c\u0435\u0442\u0440<\/th>\n<th>\u0421\u043f\u0435\u0446\u0438\u0444\u0438\u043a\u0430\u0446\u0438\u044f<\/th>\n<\/tr>\n<tr>\n<td width=\"280\">Product Type<\/td>\n<td>PXI Digital Pattern Instrument<\/td>\n<\/tr>\n<tr>\n<td>\u041c\u043e\u0434\u0435\u043b\u044c<\/td>\n<td>PXIe\u20116571<\/td>\n<\/tr>\n<tr>\n<td>Part Numbers<\/td>\n<td>786320\u201101 and 786320\u201102<\/td>\n<\/tr>\n<tr>\n<td>Manufacturer<\/td>\n<td>\u041d\u0430\u0446\u0438\u043e\u043d\u0430\u043b\u044c\u043d\u044b\u0435 \u0438\u043d\u0441\u0442\u0440\u0443\u043c\u0435\u043d\u0442\u044b<\/td>\n<\/tr>\n<tr>\n<td>\u0428\u0438\u043d\u043d\u044b\u0439 \u0438\u043d\u0442\u0435\u0440\u0444\u0435\u0439\u0441<\/td>\n<td>PXI Express<\/td>\n<\/tr>\n<tr>\n<td>Module Width<\/td>\n<td>1 Slot<\/td>\n<\/tr>\n<tr>\n<td>Channel Configurations<\/td>\n<td>8 Channels or 32 Channels<\/td>\n<\/tr>\n<tr>\n<td>Maximum Vector Rate<\/td>\n<td><strong>100 MVector\/s<\/strong><\/td>\n<\/tr>\n<tr>\n<td>Minimum Vector Period<\/td>\n<td>10 ns<\/td>\n<\/tr>\n<tr>\n<td>Maximum Data Rate<\/td>\n<td><strong>200 Mb\/s<\/strong><\/td>\n<\/tr>\n<tr>\n<td>Maximum Clock Generation<\/td>\n<td>160 MHz<\/td>\n<\/tr>\n<tr>\n<td>Digital Voltage Range<\/td>\n<td>Approximately \u22122 V to +6 V<\/td>\n<\/tr>\n<tr>\n<td>PPMU Measure Voltage Range<\/td>\n<td>Approximately \u22122 V to +6 V<\/td>\n<\/tr>\n<tr>\n<td>PPMU Force Voltage Range<\/td>\n<td>Approximately \u22122 V to +7 V<\/td>\n<\/tr>\n<tr>\n<td>Active Load<\/td>\n<td>Up to 16 mA<\/td>\n<\/tr>\n<tr>\n<td>Timing Sets<\/td>\n<td>Up to 31<\/td>\n<\/tr>\n<tr>\n<td>Edge-Placement Resolution<\/td>\n<td>39.0625 ps<\/td>\n<\/tr>\n<tr>\n<td>Drive Formats<\/td>\n<td>NR, RL, RH and SBC<\/td>\n<\/tr>\n<tr>\n<td>Pattern Sequencing<\/td>\n<td>Flow Control, Loops, Subroutines, Flags and Registers<\/td>\n<\/tr>\n<tr>\n<td>Debugging Tools<\/td>\n<td>Shmoo, Digital Scope, History RAM and Pin-State Viewers<\/td>\n<\/tr>\n<tr>\n<td>Software<\/td>\n<td>NI-Digital Pattern Driver and Digital Pattern Editor<\/td>\n<\/tr>\n<tr>\n<td>32-Channel Cooling Requirement<\/td>\n<td>82 W Slot Cooling Capacity<\/td>\n<\/tr>\n<tr>\n<td>8-Channel Cooling Requirement<\/td>\n<td>58 W or 82 W Slot Cooling Capacity<\/td>\n<\/tr>\n<tr>\n<td>Primary Applications<\/td>\n<td>Semiconductor Validation, Characterization and Production Test<\/td>\n<\/tr>\n<\/table>\n<h3>How Does the PXIe\u20116571 Work?<\/h3>\n<p>\nThe PXIe\u20116571 applies vector-based digital test patterns to a semiconductor DUT and evaluates the returned pin states.\n<\/p>\n<p>\nA simplified test path is:\n<\/p>\n<p>\n<strong>Digital Pattern \u2192 Timing and Level Resources \u2192 PXIe\u20116571 Pin Electronics \u2192 DUT \u2192 Compare Results \u2192 Test Program<\/strong>\n<\/p>\n<p>\nEach vector specifies the action for every active pin. A pin can drive logic high or low, compare the DUT response, remain inactive or participate in source and capture operations.\n<\/p>\n<p>\nThe pattern sequencer executes vectors according to the defined timing sets, opcodes, loops and subroutines. Failure information can be stored and analyzed through the software debugging tools.\n<\/p>\n<h3>Digital Pattern Testing<\/h3>\n<p>\nDigital pattern testing verifies whether a semiconductor device responds correctly to a defined sequence of digital inputs.\n<\/p>\n<p>\nA typical pattern test includes:\n<\/p>\n<ol>\n<li>Configure the DUT pin map.<\/li>\n<li>Load the voltage-level file.<\/li>\n<li>Configure timing sets.<\/li>\n<li>Load or generate the digital pattern.<\/li>\n<li>Apply power to the DUT with suitable instruments.<\/li>\n<li>Burst the digital pattern.<\/li>\n<li>Compare actual DUT states with expected states.<\/li>\n<li>Review failure information.<\/li>\n<li>Record the test result.<\/li>\n<\/ol>\n<h3>Pin Maps and Pin Groups<\/h3>\n<p>\nA pin map associates semiconductor DUT pin names with PXIe\u20116571 hardware channels.\n<\/p>\n<p>\nPin groups allow related pins to be addressed together, such as:\n<\/p>\n<ul>\n<li>Data buses<\/li>\n<li>Address buses<\/li>\n<li>Control pins<\/li>\n<li>Clock pins<\/li>\n<li>Serial interfaces<\/li>\n<li>Device-enable signals<\/li>\n<\/ul>\n<p>\nA well-designed pin map makes pattern files easier to reuse across different fixtures, sites and test programs.\n<\/p>\n<h3>Voltage-Level Configuration<\/h3>\n<p>\nLevel files define the electrical conditions used to drive and compare DUT pins.\n<\/p>\n<p>\nCommon level parameters include:\n<\/p>\n<ul>\n<li>Drive-high voltage<\/li>\n<li>Drive-low voltage<\/li>\n<li>Compare-high threshold<\/li>\n<li>Compare-low threshold<\/li>\n<li>Termination voltage<\/li>\n<li>Current limits<\/li>\n<li>Active-load settings<\/li>\n<\/ul>\n<p>\nVoltage levels should always be verified against the DUT absolute maximum ratings and recommended operating conditions.\n<\/p>\n<h3>Pattern Timing Configuration<\/h3>\n<p>\nTiming sets define when each digital action occurs within a vector period.\n<\/p>\n<p>\nTypical timing events include:\n<\/p>\n<ul>\n<li>Drive-on edge<\/li>\n<li>Drive-data edge<\/li>\n<li>Drive-return edge<\/li>\n<li>Compare-strobe edge<\/li>\n<li>Compare-strobe-open edge<\/li>\n<li>Compare-strobe-close edge<\/li>\n<\/ul>\n<p>\nMultiple timing sets allow one pattern to test different interface speeds, timing margins and operating modes.\n<\/p>\n<h3>Per-Pin PPMU Measurements<\/h3>\n<p>\nThe integrated PPMU allows DC parametric measurements to be performed on individual digital pins without requiring a separate source measure unit for every channel.\n<\/p>\n<p>\nTypical PPMU tests include:\n<\/p>\n<ul>\n<li>Input leakage current<\/li>\n<li>Output-high voltage<\/li>\n<li>Output-low voltage<\/li>\n<li>Open and short detection<\/li>\n<li>Continuity testing<\/li>\n<li>Pin-clamp characterization<\/li>\n<li>Static current measurement<\/li>\n<\/ul>\n<p>\nThe PPMU does not replace a high-precision SMU when the application requires substantially higher voltage, current, accuracy or four-quadrant sourcing capability.\n<\/p>\n<h3>Active-Load Testing<\/h3>\n<p>\nThe active load can apply current to a DUT output while the compare circuitry evaluates the resulting voltage.\n<\/p>\n<p>\nThis capability is useful for:\n<\/p>\n<ul>\n<li>VOH testing<\/li>\n<li>VOL testing<\/li>\n<li>Output-drive characterization<\/li>\n<li>Logic-threshold verification<\/li>\n<li>Semiconductor production screening<\/li>\n<\/ul>\n<h3>Source and Capture Functions<\/h3>\n<p>\nSource and capture functions allow test data to be supplied to or collected from selected DUT pins during pattern execution.\n<\/p>\n<p>\nSource data can support:\n<\/p>\n<ul>\n<li>Serial data transmission<\/li>\n<li>Parallel data transmission<\/li>\n<li>Device-programming data<\/li>\n<li>Site-specific test information<\/li>\n<li>Variable payload generation<\/li>\n<\/ul>\n<p>\nCapture functions can record:\n<\/p>\n<ul>\n<li>Serial DUT responses<\/li>\n<li>Parallel data buses<\/li>\n<li>Status registers<\/li>\n<li>Device identifiers<\/li>\n<li>Calculated result data<\/li>\n<\/ul>\n<h3>Pattern Sequencer Control<\/h3>\n<p>\nThe PXIe\u20116571 pattern sequencer provides flow-control functions that reduce the need to duplicate pattern vectors.\n<\/p>\n<p>\nSequencer features can be used for:\n<\/p>\n<ul>\n<li>Looping a pattern section<\/li>\n<li>Calling reusable subroutines<\/li>\n<li>Branching according to sequencer flags<\/li>\n<li>Passing numeric values through registers<\/li>\n<li>Handshaking with the test program<\/li>\n<li>Controlling variable pattern repetition<\/li>\n<\/ul>\n<h3>\u0412\u0430\u043b\u0438\u0434\u0430\u0446\u0438\u044f \u043f\u043e\u043b\u0443\u043f\u0440\u043e\u0432\u043e\u0434\u043d\u0438\u043a\u043e\u0432<\/h3>\n<p>\nDuring validation, engineers can use the PXIe\u20116571 to evaluate whether a new semiconductor design operates correctly across different voltage, timing and operating conditions.\n<\/p>\n<p>\nValidation applications include:\n<\/p>\n<ul>\n<li>Functional digital testing<\/li>\n<li>Interface verification<\/li>\n<li>Register-access testing<\/li>\n<li>Protocol validation<\/li>\n<li>Timing-margin analysis<\/li>\n<li>Voltage-margin analysis<\/li>\n<li>Failure diagnosis<\/li>\n<li>Design-corner evaluation<\/li>\n<\/ul>\n<h3>\u0425\u0430\u0440\u0430\u043a\u0442\u0435\u0440\u0438\u0441\u0442\u0438\u043a\u0430 \u043f\u043e\u043b\u0443\u043f\u0440\u043e\u0432\u043e\u0434\u043d\u0438\u043a\u043e\u0432<\/h3>\n<p>\nCharacterization determines how DUT performance changes across voltage, timing, temperature and process conditions.\n<\/p>\n<p>\nThe PXIe\u20116571 can support characterization through:\n<\/p>\n<ul>\n<li>Timing sweeps<\/li>\n<li>Voltage sweeps<\/li>\n<li>Shmoo testing<\/li>\n<li>Per-pin parametric measurements<\/li>\n<li>Repeated pattern testing<\/li>\n<li>Failure-history analysis<\/li>\n<li>Multi-condition test execution<\/li>\n<\/ul>\n<h3>Semiconductor Production Test<\/h3>\n<p>\nThe PXIe\u20116571 can be incorporated into automated semiconductor production systems that require repeatable digital functional and parametric testing.\n<\/p>\n<p>\nA production test sequence may include:\n<\/p>\n<ol>\n<li>Initialize the PXI system and instrument session.<\/li>\n<li>Load pin maps, specifications, levels and timing files.<\/li>\n<li>Connect the DUT through the load board.<\/li>\n<li>Perform continuity and leakage tests.<\/li>\n<li>Apply DUT power.<\/li>\n<li>Burst functional digital patterns.<\/li>\n<li>Capture test and failure results.<\/li>\n<li>Perform parametric pin measurements.<\/li>\n<li>Assign pass\/fail status or a test bin.<\/li>\n<li>Repeat the process for the next DUT or test site.<\/li>\n<\/ol>\n<h3>Multi-Site Testing<\/h3>\n<p>\nMultiple DUTs can be tested in parallel when the test-system channel count, load board and software architecture support multi-site operation.\n<\/p>\n<p>\nMulti-site testing can improve production throughput by sharing:\n<\/p>\n<ul>\n<li>Pattern resources<\/li>\n<li>PXI chassis resources<\/li>\n<li>Power instruments<\/li>\n<li>System timing<\/li>\n<li>Handler or prober interfaces<\/li>\n<li>Test-program execution<\/li>\n<\/ul>\n<p>\nThe 32-channel PXIe\u20116571 can be synchronized into larger digital subsystems with up to 512 channels when the required timing and chassis resources are provided.\n<\/p>\n<h3>Shmoo Testing<\/h3>\n<p>\nA Shmoo plot displays pass\/fail behavior while two test conditions are swept across a defined range.\n<\/p>\n<p>\nCommon Shmoo variables include:\n<\/p>\n<ul>\n<li>Supply voltage versus frequency<\/li>\n<li>Drive voltage versus timing<\/li>\n<li>Compare threshold versus timing<\/li>\n<li>Temperature versus frequency<\/li>\n<li>Timing edge versus DUT voltage<\/li>\n<\/ul>\n<p>\nShmoo testing helps engineers identify operating margins and failure boundaries during characterization.\n<\/p>\n<h3>Digital Scope and Debugging Tools<\/h3>\n<p>\nThe Digital Pattern Editor provides tools for inspecting instrument and DUT behavior during pattern development.\n<\/p>\n<p>\nDebugging resources can include:\n<\/p>\n<ul>\n<li>Digital scope<\/li>\n<li>History RAM viewer<\/li>\n<li>Pin-state viewer<\/li>\n<li>System-status viewer<\/li>\n<li>Pattern breakpoint tools<\/li>\n<li>Failure analysis<\/li>\n<li>Shmoo plotting<\/li>\n<\/ul>\n<p>\nThese tools can help locate incorrect pin assignments, voltage levels, timing edges, expected states and pattern sequences.\n<\/p>\n<h3>WGL and STIL Pattern Conversion<\/h3>\n<p>\nThe PXIe\u20116571 natively uses NI digital pattern files with the <strong>.digipat<\/strong> format.\n<\/p>\n<p>\nIndustry-standard WGL and STIL files are not executed directly by the instrument. Compatible third-party conversion tools can convert supported WGL or STIL patterns into the NI digital pattern format.\n<\/p>\n<p>\nConverted patterns should be verified for:\n<\/p>\n<ul>\n<li>Pin-state mapping<\/li>\n<li>Timing definitions<\/li>\n<li>Voltage specifications<\/li>\n<li>Pattern opcodes<\/li>\n<li>Scan data<\/li>\n<li>Cycle count<\/li>\n<li>Expected DUT responses<\/li>\n<\/ul>\n<h3>Mixed-Signal IC Testing<\/h3>\n<p>\nThe PXIe\u20116571 can be combined with other PXI instruments to test mixed-signal devices containing digital, analog and RF functions.\n<\/p>\n<p>\nA mixed-signal system may include:\n<\/p>\n<ul>\n<li>PXIe\u20116571 digital pattern instrument<\/li>\n<li>Source measure units<\/li>\n<li>Digital multimeters<\/li>\n<li>Oscilloscopes or digitizers<\/li>\n<li>Waveform generators<\/li>\n<li>RF vector signal transceivers<\/li>\n<li>PXI switching modules<\/li>\n<li>Timing and synchronization hardware<\/li>\n<\/ul>\n<h3>RF Front-End Module Testing<\/h3>\n<p>\nRF front-end modules often contain digital control interfaces in addition to RF signal paths.\n<\/p>\n<p>\nThe PXIe\u20116571 can handle digital functions such as:\n<\/p>\n<ul>\n<li>Device configuration<\/li>\n<li>Register programming<\/li>\n<li>Mode control<\/li>\n<li>Status monitoring<\/li>\n<li>Functional digital testing<\/li>\n<li>MIPI-related testing when supported by the test implementation<\/li>\n<\/ul>\n<p>\nRF generation and analysis require compatible PXI RF instruments in the same test system.\n<\/p>\n<h3>Cooling and Chassis Requirements<\/h3>\n<p>\nThe PXIe\u20116571 is a high-power, single-slot instrument. Chassis cooling capacity must be verified before installation.\n<\/p>\n<p>\nThe chassis requirements differ by version:\n<\/p>\n<ul>\n<li>The 32-channel PXIe\u20116571 requires approximately 82 W of cooling capacity for the occupied slot.<\/li>\n<li>The eight-channel PXIe\u20116571 can operate in a slot providing approximately 58 W or 82 W of cooling capacity.<\/li>\n<\/ul>\n<p>\n\u0417\u0435\u043c\u043b\u044f <a href=\"https:\/\/pxisource.com\/ru\/product\/%d0%bf%d1%8c%d0%b5-1095\/\"><strong>PXIe\u20111095<\/strong><\/a> is an appropriate chassis option for the 32-channel version because it provides the required high-power cooling architecture.\n<\/p>\n<p>\n\u0417\u0435\u043c\u043b\u044f <a href=\"https:\/\/pxisource.com\/ru\/product\/%d0%bf%d0%b8%d0%ba%d1%81%d0%b8-1084\/\"><strong>PXIe\u20111084<\/strong><\/a> can be considered for the eight-channel version when its slot configuration and system cooling requirements are satisfied.\n<\/p>\n<h3>PXI System Requirements<\/h3>\n<p>\nThe PXIe\u20116571 cannot operate independently.\n<\/p>\n<p>\nA complete system normally requires:\n<\/p>\n<ul>\n<li>PXIe\u20116571 digital pattern instrument<\/li>\n<li>Compatible high-power <a href=\"https:\/\/pxisource.com\/ru\/product-category\/%d0%bd%d0%b8\/pxi-%d1%81%d0%b8%d1%81%d1%82%d0%b5%d0%bc%d1%81\/pxi-chassis\/\">PXI Express chassis<\/a><\/li>\n<li>Compatible <a href=\"https:\/\/pxisource.com\/ru\/product-category\/%d0%bd%d0%b8\/pxi-%d1%81%d0%b8%d1%81%d1%82%d0%b5%d0%bc%d1%81\/pxi-controller\/\">PXI controller<\/a> or remote-control connection<\/li>\n<li>Suitable digital test cable and load board<\/li>\n<li>DUT power and measurement instruments<\/li>\n<li>NI-Digital Pattern Driver<\/li>\n<li>NI Digital Pattern Editor<\/li>\n<li>Application-specific pin maps, levels, timing and pattern files<\/li>\n<\/ul>\n<h3>Load Board and Cabling Considerations<\/h3>\n<p>\nThe interface between the PXIe\u20116571 and the DUT can significantly affect digital test performance.\n<\/p>\n<p>\nBefore designing or selecting a load board, consider:\n<\/p>\n<ul>\n<li>Connector compatibility<\/li>\n<li>Controlled-impedance routing<\/li>\n<li>Trace length<\/li>\n<li>Channel-to-channel skew<\/li>\n<li>Ground-return paths<\/li>\n<li>Signal integrity<\/li>\n<li>DUT power distribution<\/li>\n<li>Decoupling<\/li>\n<li>Relay and switching resources<\/li>\n<li>Protection against overvoltage and electrostatic discharge<\/li>\n<\/ul>\n<h3>System Integration Considerations<\/h3>\n<p>\nBefore selecting the PXIe\u20116571, verify:\n<\/p>\n<ul>\n<li>Required number of digital channels<\/li>\n<li>Eight-channel or 32-channel part number<\/li>\n<li>DUT voltage range<\/li>\n<li>Maximum pattern and data rate<\/li>\n<li>Required clock frequency<\/li>\n<li>PPMU voltage and current requirements<\/li>\n<li>Active-load requirements<\/li>\n<li>Pattern memory requirements<\/li>\n<li>Multi-site requirements<\/li>\n<li>Load-board and cable design<\/li>\n<li>Chassis slot cooling capacity<\/li>\n<li>PXI controller performance<\/li>\n<li>NI-Digital software compatibility<\/li>\n<\/ul>\n<h3>Troubleshooting PXIe\u20116571 Systems<\/h3>\n<p>\nIf a PXIe\u20116571 test does not execute correctly, check the hardware, software and test-program configuration.\n<\/p>\n<ol>\n<li>Verify that the PXIe\u20116571 is detected by the PXI controller.<\/li>\n<li>Confirm that the chassis slot provides sufficient cooling.<\/li>\n<li>Verify the installed NI-Digital Pattern Driver version.<\/li>\n<li>Confirm that the correct eight-channel or 32-channel configuration is selected.<\/li>\n<li>Check the pin map and channel assignments.<\/li>\n<li>Verify DUT voltage levels and current limits.<\/li>\n<li>Check timing-set periods and edge placement.<\/li>\n<li>Confirm the pattern file and label name.<\/li>\n<li>Review pattern compilation errors.<\/li>\n<li>Inspect load-board connections and signal integrity.<\/li>\n<li>Use digital scope and history RAM to locate failures.<\/li>\n<li>Verify trigger and synchronization configuration.<\/li>\n<li>Confirm that DUT power is applied in the correct sequence.<\/li>\n<\/ol>\n<h3>How to Choose a PXI Digital Pattern Instrument<\/h3>\n<p>\nBefore purchasing a digital pattern instrument, determine:\n<\/p>\n<ul>\n<li>Required channel count<\/li>\n<li>Required vector rate<\/li>\n<li>Required maximum data rate<\/li>\n<li>Required clock-generation rate<\/li>\n<li>DUT voltage range<\/li>\n<li>PPMU measurement requirements<\/li>\n<li>Active-load current<\/li>\n<li>Timing-set and edge-placement requirements<\/li>\n<li>Pattern memory depth<\/li>\n<li>Multi-site channel requirements<\/li>\n<li>Chassis power and cooling capacity<\/li>\n<li>Software and pattern-format requirements<\/li>\n<\/ul>\n<h3>Industries<\/h3>\n<ul>\n<li>Semiconductor Manufacturing<\/li>\n<li>Semiconductor Design Validation<\/li>\n<li>Mixed-Signal IC Testing<\/li>\n<li>RF Front-End Module Testing<\/li>\n<li>Automotive Semiconductor Test<\/li>\n<li>Consumer Electronics<\/li>\n<li>Aerospace and Defense Electronics<\/li>\n<li>Research and Development<\/li>\n<li>Automated Test Equipment<\/li>\n<\/ul>\n<h3>Applications<\/h3>\n<h4>\u0424\u0443\u043d\u043a\u0446\u0438\u043e\u043d\u0430\u043b\u044c\u043d\u043e\u0435 \u0442\u0435\u0441\u0442\u0438\u0440\u043e\u0432\u0430\u043d\u0438\u0435 \u043f\u043e\u043b\u0443\u043f\u0440\u043e\u0432\u043e\u0434\u043d\u0438\u043a\u043e\u0432<\/h4>\n<p>\nThe PXIe\u20116571 can apply digital stimulus patterns and compare DUT responses against expected pin states.\n<\/p>\n<h4>DC Parametric Measurement<\/h4>\n<p>\nIntegrated per-pin PPMUs support continuity, leakage, output-voltage and other static pin measurements.\n<\/p>\n<h4>Timing Characterization<\/h4>\n<p>\nProgrammable timing sets and edge placement allow engineers to evaluate DUT timing margins and operating limits.\n<\/p>\n<h4>Shmoo Testing<\/h4>\n<p>\nVoltage, frequency and timing conditions can be swept to visualize semiconductor pass\/fail operating regions.\n<\/p>\n<h4>Multi-Site Production Test<\/h4>\n<p>\nMultiple instruments and DUT sites can be synchronized to increase semiconductor production throughput.\n<\/p>\n<h4>Mixed-Signal IC Test<\/h4>\n<p>\nThe PXIe\u20116571 can be integrated with PXI analog, RF, power and switching modules to test complex mixed-signal devices.\n<\/p>\n<h3>PXIe\u20116571 vs PXIe\u20116570<\/h3>\n<table>\n<tr>\n<th>\u0424\u0443\u043d\u043a\u0446\u0438\u044f<\/th>\n<th>PXIe\u20116571<\/th>\n<th>PXIe\u20116570<\/th>\n<\/tr>\n<tr>\n<td>Channel Configurations<\/td>\n<td>8 or 32 Channels<\/td>\n<td>32 Channels<\/td>\n<\/tr>\n<tr>\n<td>Maximum Vector Rate<\/td>\n<td>100 MVector\/s<\/td>\n<td>100 MVector\/s<\/td>\n<\/tr>\n<tr>\n<td>Maximum Data Rate<\/td>\n<td>200 Mb\/s<\/td>\n<td>200 Mb\/s<\/td>\n<\/tr>\n<tr>\n<td>Module Width<\/td>\n<td><strong>1 Slot<\/strong><\/td>\n<td>2 Slots<\/td>\n<\/tr>\n<tr>\n<td>Active Load<\/td>\n<td>16 mA<\/td>\n<td>24 mA<\/td>\n<\/tr>\n<tr>\n<td>Channel Density<\/td>\n<td><strong>Higher<\/strong><\/td>\n<td>Lower<\/td>\n<\/tr>\n<tr>\n<td>Best For<\/td>\n<td>High-Density or Low-Channel-Count Configurations<\/td>\n<td>Applications Requiring Higher Active-Load Capability<\/td>\n<\/tr>\n<\/table>\n<p>\nThe PXIe\u20116571 provides higher single-slot channel density and offers an eight-channel configuration. The PXIe\u20116570 occupies two slots but provides a higher active-load capability.\n<\/p>\n<h3>PXIe\u20116571 vs PXIe\u20116556<\/h3>\n<table>\n<tr>\n<th>\u0424\u0443\u043d\u043a\u0446\u0438\u044f<\/th>\n<th>PXIe\u20116571<\/th>\n<th>PXIe\u20116556<\/th>\n<\/tr>\n<tr>\n<td>Instrument Type<\/td>\n<td>Digital Pattern Instrument<\/td>\n<td>High-Speed Digital Waveform Generator\/Analyzer<\/td>\n<\/tr>\n<tr>\n<td>Primary Application<\/td>\n<td>Semiconductor Pattern Test<\/td>\n<td>Digital Interface and Waveform Test<\/td>\n<\/tr>\n<tr>\n<td>Per-Pin PPMU<\/td>\n<td><strong>Integrated<\/strong><\/td>\n<td>Different Parametric Architecture<\/td>\n<\/tr>\n<tr>\n<td>Pattern Sequencer<\/td>\n<td><strong>Semiconductor-Oriented<\/strong><\/td>\n<td>Waveform-Oriented<\/td>\n<\/tr>\n<tr>\n<td>Digital Pattern Editor<\/td>\n<td><strong>Supported<\/strong><\/td>\n<td>Uses NI-HSDIO Workflow<\/td>\n<\/tr>\n<tr>\n<td>Best For<\/td>\n<td>IC Validation and Production Test<\/td>\n<td>High-Speed Digital Protocol and Waveform Testing<\/td>\n<\/tr>\n<\/table>\n<h3>Recommended Related Products<\/h3>\n<table>\n<tr>\n<td width=\"220\">\n<a href=\"https:\/\/pxisource.com\/ru\/product\/pxie-6570\/\"><strong>PXIe\u20116570<\/strong><\/a>\n<\/td>\n<td>32-channel PXI digital pattern instrument with 100 MVector\/s operation and 24 mA active-load capability.<\/td>\n<\/tr>\n<tr>\n<td>\n<a href=\"https:\/\/pxisource.com\/ru\/product\/pxie-6556\/\"><strong>PXIe\u20116556<\/strong><\/a>\n<\/td>\n<td>High-speed digital waveform generator\/analyzer for digital interface and electronic validation applications.<\/td>\n<\/tr>\n<tr>\n<td>\n<a href=\"https:\/\/pxisource.com\/ru\/product\/%d0%bf%d1%8c%d0%b5-1095\/\"><strong>PXIe\u20111095<\/strong><\/a>\n<\/td>\n<td>High-power PXI Express chassis suitable for the cooling requirements of the 32-channel PXIe\u20116571.<\/td>\n<\/tr>\n<tr>\n<td>\n<a href=\"https:\/\/pxisource.com\/ru\/product\/%d0%bf%d0%b8%d0%ba%d1%81%d0%b8-1084\/\"><strong>PXIe\u20111084<\/strong><\/a>\n<\/td>\n<td>PXI Express chassis option for the eight-channel PXIe\u20116571 when slot cooling requirements are satisfied.<\/td>\n<\/tr>\n<tr>\n<td>\n<a href=\"https:\/\/pxisource.com\/ru\/product\/pxie-8880\/\"><strong>PXIe\u20118880<\/strong><\/a>\n<\/td>\n<td>High-performance PXI Express embedded controller for demanding automated semiconductor test systems.<\/td>\n<\/tr>\n<tr>\n<td>\n<a href=\"https:\/\/pxisource.com\/ru\/product\/pxie-4140\/\"><strong>PXIe\u20114140<\/strong><\/a>\n<\/td>\n<td>Four-channel source measure unit for semiconductor power supply and DC parametric measurements.<\/td>\n<\/tr>\n<tr>\n<td>\n<a href=\"https:\/\/pxisource.com\/ru\/product-category\/%d0%bd%d0%b8\/pxi-%d1%81%d0%b8%d1%81%d1%82%d0%b5%d0%bc%d1%81\/%d0%bc%d0%be%d0%b4%d1%83%d0%bb%d0%b8-pxi\/\"><strong>NI PXI Modules<\/strong><\/a>\n<\/td>\n<td>Modular digital, analog, RF, power and switching instruments for automated semiconductor test systems.<\/td>\n<\/tr>\n<\/table>\n<h3>Why Choose PXIe\u20116571?<\/h3>\n<ul>\n<li>Eight-channel or 32-channel configurations<\/li>\n<li>Single-slot PXI Express form factor<\/li>\n<li>Maximum vector rate of 100 MVector\/s<\/li>\n<li>Data rates up to 200 Mb\/s<\/li>\n<li>Clock generation up to 160 MHz<\/li>\n<li>Programmable digital voltage levels<\/li>\n<li>Integrated per-pin PPMUs<\/li>\n<li>16 mA active-load capability<\/li>\n<li>Up to 31 timing sets<\/li>\n<li>39.0625 ps edge-placement resolution<\/li>\n<li>Multiple digital drive formats<\/li>\n<li>Pattern sequencing and flow control<\/li>\n<li>Source and capture functions<\/li>\n<li>Digital Pattern Editor integration<\/li>\n<li>Shmoo and digital scope tools<\/li>\n<li>Suitable for semiconductor validation<\/li>\n<li>Suitable for characterization<\/li>\n<li>Suitable for multi-site production test<\/li>\n<li>Suitable for mixed-signal IC testing<\/li>\n<\/ul>\n<h3>Frequently Asked Questions<\/h3>\n<h4>What is the PXIe\u20116571?<\/h4>\n<p>\nThe PXIe\u20116571 is an eight-channel or 32-channel, 100 MVector\/s PXI Express digital pattern instrument for semiconductor validation, characterization and production testing.\n<\/p>\n<h4>What are the PXIe\u20116571 part numbers?<\/h4>\n<p>\nThe 32-channel PXIe\u20116571 is commonly identified by part number <strong>786320\u201101<\/strong>, while the eight-channel version is identified by part number <strong>786320\u201102<\/strong>.\n<\/p>\n<h4>What is the maximum PXIe\u20116571 vector rate?<\/h4>\n<p>\nThe maximum vector rate is 100 MVector\/s, corresponding to a minimum vector period of 10 ns.\n<\/p>\n<h4>What is the maximum data rate?<\/h4>\n<p>\nThe PXIe\u20116571 supports data rates up to 200 Mb\/s through supported edge-multiplier configurations.\n<\/p>\n<h4>How many channels does the PXIe\u20116571 provide?<\/h4>\n<p>\nThe module is available with either eight or 32 digital test channels.\n<\/p>\n<h4>Does the PXIe\u20116571 include a PPMU?<\/h4>\n<p>\nYes. Each digital test channel includes per-pin parametric measurement capability for force-voltage, force-current and related DC measurements.\n<\/p>\n<h4>What voltage range does the PXIe\u20116571 support?<\/h4>\n<p>\nIts digital pin electronics support approximately \u22122 V to +6 V. PPMU force-voltage operation can extend to approximately +7 V under supported conditions.\n<\/p>\n<h4>Can the PXIe\u20116571 perform continuity and leakage tests?<\/h4>\n<p>\nYes. The integrated per-pin PPMUs can support continuity, input leakage and other static pin measurements.\n<\/p>\n<h4>Does the PXIe\u20116571 support Shmoo testing?<\/h4>\n<p>\nYes. The Digital Pattern Editor includes Shmoo tools for sweeping voltage, timing and other test conditions.\n<\/p>\n<h4>Can the PXIe\u20116571 read WGL or STIL files directly?<\/h4>\n<p>\nNo. It natively uses NI .digipat files. Compatible conversion tools can convert supported WGL and STIL patterns into the NI digital pattern format.\n<\/p>\n<h4>Can multiple PXIe\u20116571 modules be synchronized?<\/h4>\n<p>\nYes. Multiple instruments can be synchronized into larger digital subsystems when the required chassis, timing and software resources are provided.\n<\/p>\n<h4>Which chassis is recommended for the 32-channel PXIe\u20116571?<\/h4>\n<p>\nThe 32-channel version requires a slot with approximately 82 W cooling capacity. The PXIe\u20111095 is a suitable high-power chassis option.\n<\/p>\n<h4>Can the eight-channel PXIe\u20116571 use a PXIe\u20111084 chassis?<\/h4>\n<p>\nYes. The eight-channel version can operate in a chassis slot providing approximately 58 W of cooling, such as an appropriately configured PXIe\u20111084.\n<\/p>\n<h4>Does the PXIe\u20116571 operate independently?<\/h4>\n<p>\nNo. It requires a compatible PXI Express chassis, PXI controller or remote host, NI-Digital software, cabling and a suitable DUT interface or load board.\n<\/p>\n<h4>What software does the PXIe\u20116571 use?<\/h4>\n<p>\nThe module uses the NI-Digital Pattern Driver and NI Digital Pattern Editor for test development, hardware control and debugging.\n<\/p>\n<h4>What is the difference between PXIe\u20116571 and PXIe\u20116570?<\/h4>\n<p>\nThe PXIe\u20116571 occupies one slot and is available with eight or 32 channels. The PXIe\u20116570 occupies two slots and provides a higher active-load capability.\n<\/p>\n<h4>What should I check before purchasing a PXIe\u20116571?<\/h4>\n<p>\nVerify the required channel count, exact part number, DUT voltage, vector rate, PPMU requirements, load-board interface, multi-site architecture, software compatibility and chassis cooling capacity.\n<\/p>\n<h3>\u0417\u0430\u043a\u043b\u044e\u0447\u0435\u043d\u0438\u0435<\/h3>\n<p>\n\u0417\u0435\u043c\u043b\u044f <strong>PXIe\u20116571 100 MVector\/s PXI Digital Pattern Instrument<\/strong> combines high-density digital pin electronics, per-pin PPMUs, programmable timing, pattern sequencing and semiconductor debugging tools in a single-slot PXI Express module. Its eight-channel and 32-channel configurations make it suitable for benchtop characterization, design validation, mixed-signal IC testing and multi-site semiconductor production systems.<\/p>","protected":false},"excerpt":{"rendered":"<p>\u041c\u0430\u043a\u0441\u0438\u043c\u0430\u043b\u044c\u043d\u0430\u044f \u0430\u043a\u0442\u0438\u0432\u043d\u0430\u044f \u043d\u0430\u0433\u0440\u0443\u0437\u043a\u0430: 16 \u043c\u0410<br \/>\n\u0428\u0438\u0440\u0438\u043d\u0430 \u043c\u043e\u0434\u0443\u043b\u044f: 1<\/p>","protected":false},"featured_media":31816,"template":"","meta":{"_acf_changed":false},"product_brand":[18],"product_cat":[739],"product_tag":[],"class_list":["post-30323","product","type-product","status-publish","has-post-thumbnail","product_brand-national-instruments","product_cat-pxi-digital-input-output","first","instock","shipping-taxable","purchasable","product-type-simple"],"acf":[],"yoast_head":"<!-- This site is optimized with the Yoast SEO Premium plugin v25.0 (Yoast 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