{"id":29008,"date":"2025-09-16T13:16:54","date_gmt":"2025-09-16T05:16:54","guid":{"rendered":"https:\/\/pxisource.com\/?post_type=product&#038;p=29008"},"modified":"2026-08-27T21:57:16","modified_gmt":"2026-08-27T13:57:16","slug":"pxie-6548","status":"publish","type":"product","link":"https:\/\/pxisource.com\/ru\/product\/pxie-6548\/","title":{"rendered":"PXIe-6548"},"content":{"rendered":"<h3>PXIe-6548 32-Channel 200 MHz Digital Waveform Instrument<\/h3>\n<p>\u0417\u0435\u043c\u043b\u044f <strong>NI PXIe-6548<\/strong> is a high-speed PXI Express digital waveform generator and analyzer designed for digital interface testing, protocol validation, device characterization and automated production test. It provides <strong>32 bidirectional single-ended digital channels<\/strong>, a maximum sample clock rate of <strong>200 \u041c\u0413\u0446<\/strong> and data rates up to <strong>400 Mbit\/s per channel<\/strong> using double data rate operation.<\/p>\n<p>With programmable output voltage levels from <strong>1.2 V to 3.3 V<\/strong>, 100 mV voltage resolution, hardware comparison and per-bank timing adjustment, the PXIe-6548 can interface with a wide range of digital devices. Its PXI Express architecture also supports synchronization with oscilloscopes, waveform generators, source measure units and other <a href=\"https:\/\/pxisource.com\/ru\/product-category\/%d0%bd%d0%b8\/pxi-%d1%81%d0%b8%d1%81%d1%82%d0%b5%d0%bc%d1%81\/%d0%bc%d0%be%d0%b4%d1%83%d0%bb%d0%b8-pxi\/\">PXI instrumentation<\/a>.<\/p>\n<h3>PXIe-6548 Product Overview<\/h3>\n<p>The PXIe-6548 combines digital waveform generation and acquisition in a single one-slot PXI Express module. Each of its 32 digital channels can generate or acquire single-ended digital data, allowing one instrument to simulate digital interfaces, capture DUT responses and compare acquired data with expected patterns.<\/p>\n<p>The module is particularly useful when a conventional static digital I\/O device does not provide sufficient speed, timing control or waveform memory. Engineers can create custom digital patterns, define sample clocks, adjust timing relationships and perform hardware-based pass\/fail comparisons through the NI-HSDIO driver.<\/p>\n<p>Two primary memory configurations are available:<\/p>\n<ul>\n<li><strong>781012-02:<\/strong> 8 Mbit of onboard memory per channel<\/li>\n<li><strong>781012-03:<\/strong> 64 Mbit of onboard memory per channel<\/li>\n<\/ul>\n<p>The correct memory option depends on the length of the generated and acquired waveforms, the number of script instructions and the amount of pattern reuse required by the test sequence.<\/p>\n<h3>Key Features of the PXIe-6548<\/h3>\n<h4>32 Bidirectional Digital Channels<\/h4>\n<p>The PXIe-6548 provides 32 single-ended digital channels that can be configured for waveform generation or acquisition. This channel count supports byte-wide, word-wide and 32-bit digital interfaces while allowing unused channels to be assigned to control or status signals.<\/p>\n<h4>200 MHz Maximum Sample Clock<\/h4>\n<p>The module supports an onboard sample clock from 100 Hz to 200 MHz. External sample clocks can also be supplied through the front-panel CLK IN connector, while the STROBE input can be used as an acquisition clock for source-synchronous interfaces.<\/p>\n<h4>Up to 400 Mbit\/s Per Channel<\/h4>\n<p>In SDR mode, the PXIe-6548 supports data rates up to 200 Mbit\/s per channel. With DDR operation, data is transferred on both clock edges, increasing the maximum rate to 400 Mbit\/s per channel at supported voltage levels.<\/p>\n<p>The maximum DDR rate depends on the programmed logic voltage:<\/p>\n<ul>\n<li>2.5 V to 3.3 V: up to 400 Mbit\/s<\/li>\n<li>1.8 V to 2.4 V: up to 375 Mbit\/s<\/li>\n<li>1.5 V to 1.7 V: up to 350 Mbit\/s<\/li>\n<li>1.2 V to 1.4 V: up to 300 Mbit\/s<\/li>\n<\/ul>\n<h4>Programmable 1.2 V to 3.3 V Logic Levels<\/h4>\n<p>The generation voltage can be programmed from 1.2 V to 3.3 V in 100 mV increments. This flexibility helps the instrument communicate with devices using common 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V digital logic.<\/p>\n<p>Generation and acquisition sessions share a common voltage resource. When both functions operate simultaneously, they must use the same configured logic family.<\/p>\n<h4>Hardware Data Comparison<\/h4>\n<p>Hardware comparison allows the PXIe-6548 to compare acquired data with expected digital states as the test runs. This reduces the amount of captured data that must be transferred to the host and is useful for bit-error testing, interface validation and automated pass\/fail decisions.<\/p>\n<h4>Per-Bank Digital Timing Adjustment<\/h4>\n<p>Digital channels are organized into timing banks that support programmable data delay. Engineers can adjust the timing relationship between channel groups and the sample clock to compensate for cable delay, fixture skew and DUT timing requirements.<\/p>\n<h4>Advanced Clocking and Synchronization<\/h4>\n<p>The PXIe-6548 can use its onboard clock, a front-panel external clock or an acquisition STROBE. It can also synchronize to the PXI Express backplane reference clock and export clock signals through front-panel connections.<\/p>\n<h4>Onboard Waveform Memory and Scripting<\/h4>\n<p>The instrument uses NI Synchronization and Memory Core architecture, where waveform data and script instructions share onboard memory. Scripting supports waveform sequencing, looping, branching and repeated pattern execution without requiring the host computer to continuously stream every sample.<\/p>\n<h3>PXIe-6548 Technical Specifications<\/h3>\n<table>\n<tbody>\n<tr>\n<th>Product Model<\/th>\n<td>NI PXIe-6548<\/td>\n<\/tr>\n<tr>\n<th>Product Type<\/th>\n<td>Digital Waveform Generator\/Analyzer<\/td>\n<\/tr>\n<tr>\n<th>Bus and Form Factor<\/th>\n<td>PXI Express, single-slot 3U module<\/td>\n<\/tr>\n<tr>\n<th>Bidirectional Digital Channels<\/th>\n<td>32<\/td>\n<\/tr>\n<tr>\n<th>Signaling Type<\/th>\n<td>Single-ended<\/td>\n<\/tr>\n<tr>\n<th>Maximum Sample Clock Rate<\/th>\n<td>200 \u041c\u0413\u0446<\/td>\n<\/tr>\n<tr>\n<th>Maximum SDR Data Rate<\/th>\n<td>200 Mbit\/s per channel<\/td>\n<\/tr>\n<tr>\n<th>Maximum DDR Data Rate<\/th>\n<td>400 Mbit\/s per channel<\/td>\n<\/tr>\n<tr>\n<th>Generation Voltage Range<\/th>\n<td>1.2 V to 3.3 V<\/td>\n<\/tr>\n<tr>\n<th>Voltage Programming Resolution<\/th>\n<td>100 mV<\/td>\n<\/tr>\n<tr>\n<th>Input Impedance<\/th>\n<td>50 k\u03a9 nominal<\/td>\n<\/tr>\n<tr>\n<th>Input Protection<\/th>\n<td>-1 V to 5 V<\/td>\n<\/tr>\n<tr>\n<th>Onboard Clock Range<\/th>\n<td>100 Hz to 200 MHz<\/td>\n<\/tr>\n<tr>\n<th>External CLK IN Range<\/th>\n<td>20 kHz to 200 MHz when used as a sample clock<\/td>\n<\/tr>\n<tr>\n<th>STROBE Range<\/th>\n<td>100 Hz to 200 MHz<\/td>\n<\/tr>\n<tr>\n<th>Programmable Function Interface<\/th>\n<td>4 PFI channels<\/td>\n<\/tr>\n<tr>\n<th>Hardware Comparison<\/th>\n<td>Supported<\/td>\n<\/tr>\n<tr>\n<th>Onboard Memory<\/th>\n<td>8 Mbit\/channel or 64 Mbit\/channel<\/td>\n<\/tr>\n<tr>\n<th>8 Mbit\/Channel Part Number<\/th>\n<td>781012-02<\/td>\n<\/tr>\n<tr>\n<th>64 Mbit\/Channel Part Number<\/th>\n<td>781012-03<\/td>\n<\/tr>\n<tr>\n<th>Clock Connections<\/th>\n<td>SMA CLK IN and CLK OUT<\/td>\n<\/tr>\n<tr>\n<th>Digital Interface Connector<\/th>\n<td>Digital Data and Control connector<\/td>\n<\/tr>\n<tr>\n<th>Driver<\/th>\n<td>NI-HSDIO<\/td>\n<\/tr>\n<tr>\n<th>Module Width<\/th>\n<td>1 PXI Express slot<\/td>\n<\/tr>\n<tr>\n<th>Typical Power Consumption<\/th>\n<td>32.2 W<\/td>\n<\/tr>\n<tr>\n<th>Warm-Up Time<\/th>\n<td>15 minutes<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<h3>How the PXIe-6548 Works<\/h3>\n<p>During waveform generation, digital patterns are transferred from the host computer to onboard memory. The PXIe-6548 then outputs the stored patterns using the selected sample clock, voltage level, data format and timing configuration.<\/p>\n<p>During acquisition, the module samples the 32 digital channels using its onboard clock, the external CLK IN signal or the source-synchronous STROBE input. Acquired samples can be stored in onboard memory and transferred to the controller for analysis.<\/p>\n<p>For validation applications, hardware comparison can evaluate the captured response against expected data while the pattern is running. Trigger and event routing can coordinate pattern generation, response acquisition and other instruments in the PXI system.<\/p>\n<h3>Clocking and Timing Options<\/h3>\n<h4>Onboard Sample Clock<\/h4>\n<p>The internal sample clock offers a programmable range from 100 Hz to 200 MHz. It is suitable for internally timed pattern generation and acquisition when the DUT does not provide its own clock.<\/p>\n<h4>External CLK IN<\/h4>\n<p>The front-panel CLK IN connection can accept an external sample clock from 20 kHz to 200 MHz. It can also serve as a PLL reference clock at supported reference frequencies.<\/p>\n<h4>Source-Synchronous STROBE<\/h4>\n<p>For acquisition applications in which the DUT provides a clock or strobe alongside the data, the PXIe-6548 can use the DDC STROBE input as the sample clock. This helps maintain the timing relationship between the incoming data and the DUT-provided clock.<\/p>\n<h4>Clock Export<\/h4>\n<p>The instrument can export sample or reference clocks through the CLK OUT connection. A generation sample clock can also be routed through the digital interface connector, simplifying clock distribution to the DUT or test fixture.<\/p>\n<h3>Hardware Comparison and Bit-Error Testing<\/h3>\n<p>The PXIe-6548 supports real-time hardware comparison between acquired and expected data. Test developers can define expected logic states and identify mismatches without manually comparing every captured sample in host software.<\/p>\n<p>This capability is valuable for:<\/p>\n<ul>\n<li>Bit-error detection<\/li>\n<li>Digital interface functional testing<\/li>\n<li>Register readback verification<\/li>\n<li>Memory device testing<\/li>\n<li>Protocol response validation<\/li>\n<li>Production pass\/fail testing<\/li>\n<\/ul>\n<p>Hardware comparison is intended for digital state evaluation. The PXIe-6548 does not include a per-pin parametric measurement unit or active-load circuitry, so applications requiring DC current measurements or semiconductor pin electronics should consider a digital pattern instrument.<\/p>\n<h3>Typical PXIe-6548 Applications<\/h3>\n<ul>\n<li>High-speed digital interface testing<\/li>\n<li>Custom digital protocol generation and analysis<\/li>\n<li>Serial-to-parallel and parallel bus validation<\/li>\n<li>Memory device functional testing<\/li>\n<li>FPGA and ASIC interface verification<\/li>\n<li>Embedded controller testing<\/li>\n<li>Digital sensor emulation<\/li>\n<li>Bit-error and data-integrity testing<\/li>\n<li>Mixed-signal device characterization<\/li>\n<li>Hardware-in-the-loop digital stimulus and capture<\/li>\n<li>Automated production test<\/li>\n<li>Research and laboratory validation<\/li>\n<\/ul>\n<h3>PXIe-6548 for Protocol Testing<\/h3>\n<p>Because the PXIe-6548 is a waveform-based instrument, engineers can define digital patterns for proprietary or nonstandard interfaces instead of relying on a fixed protocol implementation. Timing, direction, voltage and expected response data can be controlled through software.<\/p>\n<p>The instrument is well suited to parallel and source-synchronous buses within its channel, voltage and timing limits. Protocol encoding, decoding and transaction control are typically implemented in the host application or through predefined waveform scripts.<\/p>\n<h3>PXIe-6548 in Mixed-Signal Test Systems<\/h3>\n<p>Many devices require digital control signals together with analog stimulus and measurement. Installed in a PXI Express chassis, the PXIe-6548 can operate alongside oscilloscopes, arbitrary waveform generators, digital multimeters, RF instruments and programmable power supplies.<\/p>\n<p>PXI trigger lines and the 100 MHz backplane reference clock help coordinate multiple instruments. This architecture enables synchronized digital stimulus, analog acquisition and automated device evaluation in one modular system.<\/p>\n<h3>PXIe-6548 Memory Selection<\/h3>\n<h4>781012-02 with 8 Mbit per Channel<\/h4>\n<p>The 8 Mbit\/channel version is suitable for many functional tests, repeating protocol patterns and applications that use short or reusable waveforms. It can be the practical choice when deep pattern storage is not required.<\/p>\n<h4>781012-03 with 64 Mbit per Channel<\/h4>\n<p>The 64 Mbit\/channel version provides greater storage capacity for long digital sequences, extended acquisitions and tests containing many unique waveform segments. It is generally preferred when pattern length may increase during future development.<\/p>\n<p>Because scripts and waveform data share onboard memory, actual usable sample depth depends on the selected data width, waveform organization and number of script instructions.<\/p>\n<h3>PXIe-6548 Software Support<\/h3>\n<p>The PXIe-6548 is controlled through the <strong>NI-HSDIO<\/strong> instrument driver. NI-HSDIO provides configuration, waveform generation, acquisition, triggering, scripting and hardware-comparison functions.<\/p>\n<p>Supported development environments include:<\/p>\n<ul>\n<li>\u041b\u0430\u0431\u0412\u044c\u044e<\/li>\n<li>LabWindows\/CVI<\/li>\n<li>Measurement Studio<\/li>\n<li>Microsoft Visual C\/C++<\/li>\n<li>.NET languages including C# and Visual Basic .NET<\/li>\n<\/ul>\n<p>NI Measurement &amp; Automation Explorer can be used to detect the module, view device information, configure the system and perform initial troubleshooting.<\/p>\n<h3>PXIe-6548 System Requirements<\/h3>\n<p>A complete PXIe-6548 system normally requires:<\/p>\n<ul>\n<li>A compatible PXI Express chassis<\/li>\n<li>An embedded PXI controller or external computer interface<\/li>\n<li>NI-HSDIO driver software<\/li>\n<li>A compatible digital data cable<\/li>\n<li>A breakout, terminal block or custom interface fixture<\/li>\n<li>Optional clock and trigger cables<\/li>\n<li>Application development software<\/li>\n<\/ul>\n<p>NI specifies performance using a 1 m cable and recommends the SHC68-C68-D4 for applicable connections. Longer cables and unsuitable fixtures can reduce signal quality at high data rates.<\/p>\n<h3>PXIe-6548 Signal-Integrity Considerations<\/h3>\n<p>Operation at hundreds of megabits per second requires careful attention to cable length, impedance, grounding, termination and fixture design. A digital pattern that works at a low rate may become unreliable as edge timing and channel skew consume more of the available timing margin.<\/p>\n<p>For reliable results:<\/p>\n<ul>\n<li>Use short, compatible high-speed digital cables<\/li>\n<li>Maintain controlled impedance through the fixture<\/li>\n<li>Provide a low-inductance ground connection<\/li>\n<li>Avoid unterminated stubs and unnecessary adapters<\/li>\n<li>Match the programmed voltage to the DUT logic family<\/li>\n<li>Use per-bank delay to compensate for known timing offsets<\/li>\n<li>Validate the waveform at the DUT connection point<\/li>\n<\/ul>\n<h3>PXIe-6548 Comparison with Related Instruments<\/h3>\n<table>\n<tbody>\n<tr>\n<th>\u041c\u043e\u0434\u0435\u043b\u044c<\/th>\n<th>\u041a\u0430\u043d\u0430\u043b\u044b<\/th>\n<th>Maximum Clock Rate<\/th>\n<th>Maximum Data Rate<\/th>\n<th>Hardware Compare<\/th>\n<th>General Positioning<\/th>\n<\/tr>\n<tr>\n<td>PXIe-6544<\/td>\n<td>32<\/td>\n<td>100 MHz<\/td>\n<td>100 Mbit\/s<\/td>\n<td>No<\/td>\n<td>Standard-voltage digital interfacing<\/td>\n<\/tr>\n<tr>\n<td>PXIe-6545<\/td>\n<td>32<\/td>\n<td>200 \u041c\u0413\u0446<\/td>\n<td>200 Mbit\/s<\/td>\n<td>No<\/td>\n<td>Faster standard-voltage digital interfacing<\/td>\n<\/tr>\n<tr>\n<td>PXIe-6547<\/td>\n<td>32<\/td>\n<td>100 MHz<\/td>\n<td>200 Mbit\/s with DDR<\/td>\n<td>\u0414\u0430<\/td>\n<td>Programmable-voltage waveform testing<\/td>\n<\/tr>\n<tr>\n<td><strong>PXIe-6548<\/strong><\/td>\n<td><strong>32<\/strong><\/td>\n<td><strong>200 \u041c\u0413\u0446<\/strong><\/td>\n<td><strong>400 Mbit\/s with DDR<\/strong><\/td>\n<td><strong>\u0414\u0430<\/strong><\/td>\n<td><strong>Higher-speed programmable-voltage waveform testing<\/strong><\/td>\n<\/tr>\n<tr>\n<td>PXIe-6556<\/td>\n<td>24<\/td>\n<td>200 \u041c\u0413\u0446<\/td>\n<td>200 Mbit\/s<\/td>\n<td>\u0414\u0430<\/td>\n<td>Digital waveform testing with wider voltage capability and PMU functions<\/td>\n<\/tr>\n<tr>\n<td>PXIe-6571<\/td>\n<td>32<\/td>\n<td>100 MHz class<\/td>\n<td>Digital pattern operation<\/td>\n<td>\u0414\u0430<\/td>\n<td>Semiconductor test with per-pin parametric features<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<h3>PXIe-6548 vs PXIe-6547<\/h3>\n<p>The PXIe-6547 and PXIe-6548 both provide 32 bidirectional channels, programmable 1.2 V to 3.3 V logic levels and hardware comparison. The primary difference is speed.<\/p>\n<p>The PXIe-6547 has a maximum sample clock rate of 100 MHz and supports up to 200 Mbit\/s with DDR. The PXIe-6548 increases the maximum clock rate to 200 MHz and supports up to 400 Mbit\/s with DDR. Choose the PXIe-6548 when the DUT requires higher data throughput or additional timing margin.<\/p>\n<h3>PXIe-6548 vs Digital Pattern Instruments<\/h3>\n<p>The PXIe-6548 is a digital waveform generator\/analyzer controlled by NI-HSDIO. It is optimized for waveform-based interface testing and does not contain a per-pin parametric measurement unit or active-load circuitry.<\/p>\n<p>A digital pattern instrument such as the PXIe-6571 is better suited to semiconductor validation and production test that requires pin electronics, per-pin voltage configuration, DC parametric measurements or digital pattern workflows. The appropriate choice depends on whether the application primarily requires flexible high-speed waveforms or semiconductor-oriented pin resources.<\/p>\n<h3>Recommended Related Products<\/h3>\n<ul>\n<li><a href=\"https:\/\/pxisource.com\/ru\/product\/pxie-6547\/\"><strong>PXIe-6547<\/strong><\/a> \u2013 32-channel digital waveform instrument for applications requiring lower clock and data rates.<\/li>\n<li><a href=\"https:\/\/pxisource.com\/ru\/product\/%d0%bf%d0%ba%d1%81%d0%b8%d0%b5-6545\/\"><strong>PXIe-6545<\/strong><\/a> \u2013 200 MHz digital instrument for standard-voltage interface testing without hardware comparison.<\/li>\n<li><a href=\"https:\/\/pxisource.com\/ru\/product\/pxie-6556\/\"><strong>PXIe-6556<\/strong><\/a> \u2013 24-channel high-speed digital waveform instrument with a broader voltage range and parametric measurement capability.<\/li>\n<li><a href=\"https:\/\/pxisource.com\/ru\/product\/%d0%bf%d0%ba%d1%81%d0%b8%d0%b5-6571\/\"><strong>PXIe-6571<\/strong><\/a> \u2013 digital pattern instrument for semiconductor characterization and production test.<\/li>\n<li><a href=\"https:\/\/pxisource.com\/ru\/product\/pxie-1085\/\"><strong>PXIe-1085<\/strong><\/a> \u2013 high-bandwidth PXI Express chassis for multi-instrument automated test systems.<\/li>\n<li><a href=\"https:\/\/pxisource.com\/ru\/product\/pxie-8880\/\"><strong>PXIe-8880<\/strong><\/a> \u2013 embedded PXI Express controller for computationally demanding test applications.<\/li>\n<\/ul>\n<h3>PXIe-6548 Selection Guidance<\/h3>\n<p>Before selecting the PXIe-6548, verify the following requirements:<\/p>\n<ul>\n<li>The DUT uses single-ended digital signaling<\/li>\n<li>No more than 32 bidirectional data channels are required<\/li>\n<li>The required logic voltage is between 1.2 V and 3.3 V<\/li>\n<li>The required sample clock does not exceed 200 MHz<\/li>\n<li>The required DDR data rate is supported at the selected voltage<\/li>\n<li>The application does not require active-load or per-pin PMU functions<\/li>\n<li>The selected memory version can store the required patterns<\/li>\n<li>The chassis provides a compatible PXI Express peripheral slot<\/li>\n<li>The cable and fixture can maintain signal integrity at the target rate<\/li>\n<\/ul>\n<h3>Common PXIe-6548 Troubleshooting Checks<\/h3>\n<h4>The Module Is Not Detected<\/h4>\n<p>Confirm that the chassis and controller are powered correctly, the module is fully seated in a compatible PXI Express slot and a supported NI-HSDIO driver version is installed. Use NI MAX to check whether the hardware appears and passes a self-test.<\/p>\n<h4>Acquired Data Contains Unexpected Errors<\/h4>\n<p>Verify the voltage family, sampling edge, clock source and data direction. Inspect cable length, grounding and fixture impedance. Per-bank data delay may be required to center the acquisition point within the valid data window.<\/p>\n<h4>Generation Does Not Match the DUT Voltage<\/h4>\n<p>Check the programmed generation voltage and confirm that simultaneous generation and acquisition sessions use compatible voltage settings. Measure the voltage at the DUT because loading and fixture losses can affect the observed signal.<\/p>\n<h4>External Clocking Is Unstable<\/h4>\n<p>Confirm that the external clock meets the required amplitude, frequency and duty-cycle limits. Use proper 50 \u03a9 cabling for the SMA clock connection and verify whether the configured input impedance is appropriate for the clock source.<\/p>\n<h4>Waveform Memory Is Insufficient<\/h4>\n<p>Reduce duplicate waveform data by using scripts, loops and reusable waveform segments. If the test requires long nonrepeating patterns or extended acquisitions, select the 64 Mbit\/channel version.<\/p>\n<h3>Frequently Asked Questions<\/h3>\n<h4>What is the PXIe-6548 used for?<\/h4>\n<p>The PXIe-6548 generates, acquires and compares high-speed digital waveforms. Typical uses include protocol testing, FPGA interface validation, memory testing, embedded device characterization and automated functional test.<\/p>\n<h4>How many digital channels does the PXIe-6548 provide?<\/h4>\n<p>It provides 32 bidirectional single-ended digital channels.<\/p>\n<h4>What is the maximum clock rate?<\/h4>\n<p>The maximum onboard sample clock rate is 200 MHz.<\/p>\n<h4>What is the maximum data rate?<\/h4>\n<p>The maximum rate is 200 Mbit\/s per channel in SDR mode and up to 400 Mbit\/s per channel in DDR mode. The maximum DDR rate varies with the selected voltage level.<\/p>\n<h4>Which logic voltages are supported?<\/h4>\n<p>The generation voltage is programmable from 1.2 V to 3.3 V in 100 mV increments.<\/p>\n<h4>Does the PXIe-6548 support hardware comparison?<\/h4>\n<p>Yes. It can compare acquired data with expected states in hardware for bit-error detection and functional pass\/fail testing.<\/p>\n<h4>Does the PXIe-6548 include a PMU?<\/h4>\n<p>No. The PXIe-6548 does not include a per-pin parametric measurement unit or active-load circuitry.<\/p>\n<h4>What are the PXIe-6548 part numbers?<\/h4>\n<p>Part number <strong>781012-02<\/strong> provides 8 Mbit of memory per channel, while part number <strong>781012-03<\/strong> provides 64 Mbit per channel.<\/p>\n<h4>Which software driver controls the PXIe-6548?<\/h4>\n<p>The module is controlled using the NI-HSDIO driver.<\/p>\n<h4>Can the PXIe-6548 use an external sample clock?<\/h4>\n<p>Yes. An external sample clock can be supplied through CLK IN. The STROBE connection can also provide the sample clock for acquisition applications.<\/p>\n<h4>Can the PXIe-6548 operate without a PXI chassis?<\/h4>\n<p>No. It requires a compatible PXI Express chassis and either an embedded controller or an external computer connection.<\/p>\n<h3>Why Choose the PXIe-6548?<\/h3>\n<p>The PXIe-6548 is a strong choice for engineers who need more capability than conventional digital I\/O but do not require semiconductor-focused digital pattern instrumentation. It combines 32 bidirectional channels, programmable voltage levels, high-speed DDR operation, hardware comparison and flexible clocking in a compact PXI Express module.<\/p>\n<p>Its ability to synchronize with other PXI instruments makes it suitable for integrated digital and mixed-signal test systems used in design validation, characterization and production environments.<\/p>\n<h3>Request a Quote for the PXIe-6548<\/h3>\n<p>Contact us for current availability, lead time and project pricing for the <strong>NI PXIe-6548 Digital Waveform Instrument<\/strong>. Please specify whether your application requires the 8 Mbit\/channel version, part number 781012-02, or the 64 Mbit\/channel version, part number 781012-03.<\/p>\n<p>We can also help identify compatible PXI Express chassis, controllers, high-speed digital cables and related instruments for your automated test system.<\/p>","protected":false},"excerpt":{"rendered":"<p>\u0410\u043a\u0442\u0438\u0432\u043d\u0430\u044f \u043d\u0430\u0433\u0440\u0443\u0437\u043a\u0430: \u041d\u0435\u0442<br \/>\n\u041a\u043e\u043b\u0438\u0447\u0435\u0441\u0442\u0432\u043e \u0434\u0432\u0443\u043d\u0430\u043f\u0440\u0430\u0432\u043b\u0435\u043d\u043d\u044b\u0445 \u0446\u0438\u0444\u0440\u043e\u0432\u044b\u0445 \u043a\u0430\u043d\u0430\u043b\u043e\u0432: 32<br \/>\n\u0423\u0440\u043e\u0432\u043d\u0438 \u0438 \u0434\u0438\u0430\u043f\u0430\u0437\u043e\u043d \u043b\u043e\u0433\u0438\u043a\u0438: 1,2 \u0412 \u2013 3,3 \u0412, \u043f\u0440\u043e\u0433\u0440\u0430\u043c\u043c\u0438\u0440\u0443\u0435\u043c\u044b\u0435<br \/>\n\u041f\u043e\u0434\u0434\u0435\u0440\u0436\u0438\u0432\u0430\u0435\u0442 \u0441\u0440\u0430\u0432\u043d\u0435\u043d\u0438\u0435 \u043e\u0431\u043e\u0440\u0443\u0434\u043e\u0432\u0430\u043d\u0438\u044f: \u0414\u0430<br \/>\n\u041f\u043e\u0434\u0434\u0435\u0440\u0436\u043a\u0430 PMU: \u041d\u0435\u0442<br \/>\n\u0422\u0438\u043f \u0441\u0438\u0433\u043d\u0430\u043b\u0438\u0437\u0430\u0446\u0438\u0438: \u041e\u0434\u043d\u043e\u043f\u043e\u043b\u044e\u0441\u043d\u044b\u0439<br \/>\nMaximum Generation Rate: 40 Mbits\/s<br \/>\nMaximum Acquisition Rate: 30 Mbits\/s<\/p>","protected":false},"featured_media":31813,"template":"","meta":{"_acf_changed":false},"product_brand":[18],"product_cat":[739],"product_tag":[],"class_list":["post-29008","product","type-product","status-publish","has-post-thumbnail","product_brand-national-instruments","product_cat-pxi-digital-input-output","first","instock","shipping-taxable","purchasable","product-type-simple"],"acf":[],"yoast_head":"<!-- This site is optimized with the Yoast SEO Premium plugin v25.0 (Yoast SEO v28.4) - https:\/\/yoast.com\/product\/yoast-seo-premium-wordpress\/ -->\n<title>NI PXIe-6548 PXI Digital Waveform Instrument 781012-02, In Stock | Project Pricing<\/title>\n<meta name=\"description\" content=\"The PXIe-6548 is a 32-channel, 200 MHz digital waveform instrument for high-speed interface testing, protocol validation, and automated test systems.\" \/>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link 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